UA78M05MJG

Vendor:TIPackage Cooled:DIP-8D/C:8505

< Notice > 1. When power supply of S1T8825B is disconnected, CLK, DATA, EN port from MCU should be pulled low. 2. When power goes up first, R counter data should be entered earlier than N1 and N2 counter data. 3. When power goes up first, control data should be entered earlier than N1 and N2 counter data.

UA78M05MJGB

Vendor:UNITRODEPackage Cooled:N/AD/C:05+

Generates 106.25 MHz clocks from a 21.25 MHz crystal Less than 45ps one sigma jitter (10ps typ.) Less than 130ps absolute jitter Less than 25ps accumulative jitter @ 256 cycles Rise/fall times less than 1.2ns driving 15pF On-chip loop filter components 3.0V-5.5V supply range 8-pin, 150-mil SOIC package

UA78M06HM

Vendor:N/APackage Cooled:N/AD/C:08+09+

Synchronous operation is possible only in the QAM or DPSK modes. Operation is similar to that of the Asynchronous mode except that data must be synchronized to a clock and no variation in data transfer rate is allowable. Serial input data appearing at TXD must be valid on the rising edge of TXCLK.

UA78M08CKC

Vendor:TIPackage Cooled:ti

Single channel 5 V, 3.3 V and 2.5 V operation 5 V tolerant inputs Industrial temperature range (−40 C to +85 C) After reset, all registers are identical to the typical 16C450 register set Capable of running with all existing generic 16C450 software Pin compatibility with the industry-standard ST16C450/550, TL16C450/550, PC16C450/550. Software compatible with SC16C750 and TL16C750 Up to 3 Mbit/s...

UA78M08CKTPR

Vendor:N/APackage Cooled:N/AD/C:08+09+

NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are available only as Tape and Reel in the quantity indicated after the slash (e.g. /3K indicates 3000 devices per reel). Ordering 3000 pieces of the UA78M08CKTPRN/3K will get a single 3000-piece Tape and Reel. For detailed Tape and Reel mechanical informati...

UA78M08CTI

UA78M09CKTPR

Vendor:TIPackage Cooled:TID/C:03

The Hynix HYM76V4M635HGT6 Series are 4Mx64bits Synchronous DRAM Modules. The modules are composed of four 4Mx16bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. Two 0.33uF and one 0.1uF decoupling capacitors per each SDRAM are mounted on the PCB.

UA78M09CKTPR

Vendor:availD/C:03+

The Hynix HYM76V4M635HGT6 Series are 4Mx64bits Synchronous DRAM Modules. The modules are composed of four 4Mx16bits CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. Two 0.33uF and one 0.1uF decoupling capacitors per each SDRAM are mounted on the PCB.

UA78M09CKTPRG3

Vendor:TIPackage Cooled:TID/C:05+

3. All devices are guaranteed to trigger at an IF value less than or equal to max IFT. Therefore, recommended operating IF lies between max IFT (30 mA for MOC3020M, 15 mA for MOC3010M and MOC3021M, 10 mA for MOC3011M and MOC3022M, 5 mA for MOC3012M and MOC3023M) and absolute max IF (60 mA).

UA78M09CKTPRG3

Vendor:availPackage Cooled:3-PFMD/C:05+

3. All devices are guaranteed to trigger at an IF value less than or equal to max IFT. Therefore, recommended operating IF lies between max IFT (30 mA for MOC3020M, 15 mA for MOC3010M and MOC3021M, 10 mA for MOC3011M and MOC3022M, 5 mA for MOC3012M and MOC3023M) and absolute max IF (60 mA).

UA78M12C

Vendor:TIPackage Cooled:TO-252

FEATURE: Output frequency range 50khz ~ 15Mhz . Automatic power on/off function . Low voltage and low power consumption . High speedmax(3v=10Mhz);(5v=15Mhz) Low power dissipationicc=4uA(max.)at ta=25 Wide operating voltage rangevcc(opr)=2 ~ 5v RECOMMENDED OPERATING CONDITIONS: Supply voltage vcc 2.5v to 5v

UA78M12CKC

Vendor:TIPackage Cooled:TO-3P

When the device is disabled, via the ENABLE input, CT is discharged to near ground. When the device is re-enabled, CT is charged by an internal current source of approximately 1 mA. The comparator output remains blanked until the voltage on CT reaches approximately 3.0 volts.

UA78M12CKTPR

Vendor:TI

A coder, an analog-to-digital converter or ADC, digitizes the analog voice signal, and a decoder, a digital-to-analog converter or DAC, converts the digital-voice signal to an analog output. The PCM codec provides a companding option to overcome the bandwidth limitations of telephone networks without degrading the sound quality. The human auditory system is a logarithmic system in which high amplitude si...

UA78M12CKTPRG3

Vendor:TID/C:07+

This INFINEON module is an industry standard 144 pin 8-byte Synchronous DRAM (SDRAM) Small Outline Dual In-line Memory Modules (SO-DIMM) which is organised as 64Mx64 high speed array in two memory banks designed for use in non-parity applications. These SO-DIMMs use back side protected P-TFBGA package technology. Decoupling capacitors are mounted on the board.

UA78M12HM

Vendor:FPackage Cooled:TO3D/C:77+

The LM45 series are precision integrated-circuit temperature sensors, whose output voltage is linearly proportional to the Celsius (Centigrade) temperature. The LM45 does not re- quire any external calibration or trimming to provide accura- cies of 2˚C at room temperature and 3˚C over a full −20 to +100˚C temperature range. Low cost is assured by trimming and calibration at the wa...

UA78M12HMQB/C

Vendor:FPackage Cooled:CAN3D/C:08+

Notes: 5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 7. tHZOE, tHZBE, tHZCE, and tHZWE are spec...

UA78M12MJGB

UA78M12UC

Vendor:FAIRCHILDPackage Cooled:8310D/C:155

UA78M15

Vendor:fscPackage Cooled:fscD/C:dc84

The input buffer threshold has programmable TTL/3.3V/ 2.5V compatible levels. The output driver can source 4mA and sink 8mA in 3.3V mode. The output drivers have a separate VCCIO reference input which is independent of the main VCC supply for the device. This feature allows individual output drivers to drive either 3.3V (from the device VCC) or 2.5V (from the VCCIO pin) output levels while the device...

UA78M15

Vendor:fscPackage Cooled:fscD/C:dc84

The input buffer threshold has programmable TTL/3.3V/ 2.5V compatible levels. The output driver can source 4mA and sink 8mA in 3.3V mode. The output drivers have a separate VCCIO reference input which is independent of the main VCC supply for the device. This feature allows individual output drivers to drive either 3.3V (from the device VCC) or 2.5V (from the VCCIO pin) output levels while the device...

UA78M15AHC

Vendor:CAN3Package Cooled:CAN3D/C:FAC

UA78M15CKC

Vendor:tiPackage Cooled:tiD/C:dc97

The LVT16543 and LVTH16543 contain two sets of D-type latches, with separate input and output controls for each. For data flow from A to B, for example, the A to B Enable (CEAB) input must be LOW in order to enter data from the A Port or take data from the B Port as indicated in the Data I/ O Control Table. With CEAB LOW, a low signal on (LEAB) input makes the A to B latches transparent; a sub- sequen...

UA78M15HC

Vendor:FSCD/C:8701

NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at Vcc = 2.5V, +25C ambient. 3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. VOH = Vcc - 0.6V at rated current.

UA78M33CDCY

Vendor:TIPackage Cooled:SOT223D/C:2500

The A-to-B enable (CEAB) input must be low to enter data from A or to output data to B. If both CEAB and CLKAB are low, then B port will have the level of A port prior to the most recent low-to-high transition of CLKAB. Data flow from B to A is similar, but requires the use of CEBA, CLKBA, and OEBA inputs.

UA78M33CDCY

Vendor:TIPackage Cooled:SOT223D/C:2500

The A-to-B enable (CEAB) input must be low to enter data from A or to output data to B. If both CEAB and CLKAB are low, then B port will have the level of A port prior to the most recent low-to-high transition of CLKAB. Data flow from B to A is similar, but requires the use of CEBA, CLKBA, and OEBA inputs.

UA78M33CDCYR

Vendor:3500

The deflection amplifier circuit of Figure 1 achieves arbitrary beam positioning for a fast heads-up display. Maximum tran- sition times are 4µs while delivering 2A pk currents to the 13mH coil. The key to this circuit is the sense resistor (RS) which converts yoke current to voltage for op amp feedback. This negative feedback forces the coil current to stay exactly proportional to the control v...

UA78M33CDCYRG3-RHT

D/C:08+

UA78M33CKTP

Vendor:TexasPackage Cooled:18000D/C:07+

UA78M33CKTPR

CNY17-1/2/3 are also available in white package by specifying -M suffix (eg. CNY17-2-M) UL recognized (File # E90700) VDE recognized C 102497 for white package C Add option V for white package (e.g., CNY17-2V-M) C File #102497 C Add option 300 for black package (e.g., CNY17-2.300) C File #94766 Current transfer ratio in select groups

UA78MGU1C

Package Cooled:TO220-4

(6) Output Driver Control Function By setting HALTB pin to L, high side output drivers become OFF and Low side output drivers become ON, then both of OUT1/1X and OUT2/2X output VSSO level signals. This function works regardless of STBYB pin setting.

UA78MGUIC

Vendor:TO-4Package Cooled:3580D/C:FAC

Digital End-of-Charge Output: N-Ch open drain output. Low indicates charging, a current that is higher than the programmed current set by REOC is charging the battery. When the current drops to less than the current set by REOC, the output goes high impedance, indicating end-of-charge.

UA78P05SC

Package Cooled:143

address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by the chip enables (either CE0 or CE1) permit the on-chip circuitry of each port to enter a very low standby power mode. The 70V657 can support an operating voltage of either 3.3V or 2.5V on one or both ports, controlled by the OPT pins. The power suppl...

UA78PG

Package Cooled:CAN4D/C:08+

The SOA curves combine the effect of of all limits for this Power Op Amp. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. The following guidelines may save exten- sive analytical efforts.

UA78PGASC

Package Cooled:CAN4D/C:02+/03

The UCODE HSL IC (UCODE High frequency Smart Label) is a dedicated chip for passive, intelligent tags and labels, especially for supply chain management and logistics applications in the US, where operating distances of several meters can be realized. Further, the UCODE HSL technology platform is also designed for operation under European regulations.

UA78PGASC

Package Cooled:CAN4D/C:08+

The UCODE HSL IC (UCODE High frequency Smart Label) is a dedicated chip for passive, intelligent tags and labels, especially for supply chain management and logistics applications in the US, where operating distances of several meters can be realized. Further, the UCODE HSL technology platform is also designed for operation under European regulations.

UA78S40

Package Cooled:2000

The MSK 4201 is a complete H-Bridge hybrid to be used for DC brushed motor control or Class D switchmode amplifier. All of the drive/control circtuitry for the lowside and highside switches are internal to the hybrid. The user provides a TTL compatible PWM signal for simultaneous amplitude and direction control in four quadrant mode. The internal drive circuitry will provide proper deadtime/shoot-through p...

UA78S40DCQR

A tunable delay cell (controlled via CLKDACTRL) is integrated between the ADC and the DMUX on the clock path to fine-tune the data according to the clock alignment at the interface between the ADC and the DMUX. This delay can be tuned from -250 to 250 ps around a default center value, featuring a 500 ps typical tuning range. No tuning should be necessary for operating frequencies up to 1.5 Gsps.

UA7905

Package Cooled:TO-252

Product names or services listed in this publication are for identification purposes only, and may be trademarks or registered trademarks of their respective companies. All other marks mentioned herein are the property of their respective holders.

UA7905

Package Cooled:TO-252

Product names or services listed in this publication are for identification purposes only, and may be trademarks or registered trademarks of their respective companies. All other marks mentioned herein are the property of their respective holders.

UA7905KC

Vendor:KOREAPackage Cooled:TO-3D/C:08+

Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltages are wit...

UA7905KM

UA7905VC

UA7908CKCSE3

UA7908UC

The HYM72V32M636H(L)T6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes mem- ory. The HYM72V32M636H(L)T6 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

UA7912C

Vendor:850Package Cooled:TO-220

Calculation example (please refer to the parameter table above) Suppose the use of a pressure sensor of type SPD 015G over a temperature range of 100 C. The typical full scale span is 140 mV. The offset (at a fixed temperature) will be between -50 and +50 mV.

UA7912C

Vendor:850Package Cooled:TO-220

Calculation example (please refer to the parameter table above) Suppose the use of a pressure sensor of type SPD 015G over a temperature range of 100 C. The typical full scale span is 140 mV. The offset (at a fixed temperature) will be between -50 and +50 mV.

UA7912CKCS

Vendor:TIPackage Cooled:TO-220D/C:04+

AMD MirrorBit flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effec- tiveness. The device electrically erases all bits within a sector simultaneously via hot-hole assisted erase. The data is programmed using hot electron injection.

UA7912KCF

Vendor:仙童Package Cooled:8015D/C:8023

This N-Channel power MOSFET is manufactured using the innovative UltraFET® process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in appl...

UA7912KCF

Vendor:仙童D/C:8023

This N-Channel power MOSFET is manufactured using the innovative UltraFET® process. This advanced process technology achieves the lowest possible on-resistance per silicon area, resulting in outstanding performance. This device is capable of withstanding high energy in the avalanche mode and the diode exhibits very low reverse recovery time and stored charge. It was designed for use in appl...

UA7912KM

The internal burst counter is fiexd to 2-bit sequential for both read and write operations. Synchronous pipeline read and late write enable high speed operations. Simple depth expansion is accomplished by using LD for port selection. Byte write operation is supported with BW0 and BW1 ( BW2 and BW3) pins for x18 ( x36 ) device. IEEE 1149.1 serial boundary scan (JTAG) simplifies monitoriing package pads attach...

UA7912MQB

UA7915KC

Vendor:98

Functional Description The HSDL-3310 is a small form factor infrared (IR) transceiver module that provides interface between logic and IR signals for through-air, serial, half-duplex IR data link. The module is compliant to IrDA physical layer specifications 1.3 and is IEC 825-Class 1 eye safe.

UA7915MK

Vendor:NSPackage Cooled:CAND/C:2500

These devices are organized as four 4-bit low-impedanceswitcheswithseparate output-enable (OE) inputs. When OE is low, the switch is on, and data can flow from port A to port B, or vice versa. When OE is high, the switch is open, and the high-impedance state exists between the two ports.

UA791KC

Vendor:FPackage Cooled:TO-3D/C:05+

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the ...

UA791KC

Vendor:FPackage Cooled:TO-3D/C:05+

Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the ...

UA796AHMQB

Vendor:FSCD/C:06+

This is a dual function pin. In the IDT Standard mode, the FF function is selected. FF indicates whether or not the FIFO memory is full. In the FWFT mode, the IR function is selected. IR indicates whether or not there is space available for writing to the FIFO memory. FF/IR is synchronized to the LOW-to-HIGH transition of CLKA.

UA796DC

Vendor:FSCPackage Cooled:789D/C:04+

The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system micropro- cessor to read boot-up firmware from the Flash mem- ory device.

UA796DM

Vendor:FSCPackage Cooled:657D/C:04+

Ausgabe 01.2001 Herausgegeben von Infineon AG , Marketing-Kommunikation, Balanstraße 73, 81541 Mnchen © Infineon AG 1999. Alle Rechte vorbehalten. Wichtige Hinweise! Gewähr fr die Freiheit von Rechten Dritter leisten wir nur fr Bauelemente selbst, nicht fr Anwendungen, Verfahren und fr die in Bauelementen oder Baugruppen realisierten Schaltungen. Mit den Angaben werden die Bauele...

UA796HM/883

Vendor:FSCD/C:04+

TDA7053A SPECIFICATIONS 4.5 - 18V supply voltage range 1.5A max non-repetitive peak output current 1.25A max repetitive peak output current 1.1W output power using 6V supply into 8[1] load (THD = 10%) 20k[1] internal input impedance 210uV noise output voltage 20Hz to 300kHz bandwidth (typical) at C1 dB

UA796HMQB

Vendor:FSCD/C:08+

The Si9181 is rated to deliver up to 600-mA peak current for 2 ms. The maximum load current is specified for continuous operation and for finite pulse widths. Maximum allowable junc- tion temperature, junction-to-ambient thermal impedance at a thermal equilibrium, and the ambient temperature determine the continuous current rating at a given input-to-output differ- ential. The input voltage, p-channel ...

UA796MH

Vendor:NSCPackage Cooled:CAN

Input a signal to the Pin18 and measure the output between the Pins22 and 23 at an output distortion factor of 5%. Input a signal (C45dBm) to the Pin18 and mea- sure an output change between the Pins22 and 23 when IL changes from 80mA to 30mA. Input a signal (C45dBm) to the Pin18 and measure an output change between the Pins 22 and 23 when the Pin12 changes from no microphone input signal to C40dBm...

UA796P

Notes: 1. See Figure 1 to establish pulsed conditions. 2. Derate above 80C at 0.63 mA/C. 3. See Figure 2 to establish pulsed conditions. 4. Derate above 46C at 0.54 mA/C. 5. See Figure 7 to establish pulsed conditions. 6. Derate above 53C at 0.45 mA/C. 7. See Figure 8 to establish pulsed conditions. 8. Derate above 81C at 0.52 mA/C. 9. See Figure 9 to establish pulsed conditions. 10. Derate above 39C at...

UA796PC

Vendor:FPackage Cooled:DIP-14

The I/O and logic functions of the FPGA and their associ- ated interconnections are established by a configuration program. The program is loaded either automatically upon power up, or on command, depending on the state of the three FPGA mode pins. In Master Mode, the FPGA auto- matically loads the configuration program from an external memory. The Serial Configuration EEPROM has been designed for co...

UA798HC

Vendor:FSC

the full-scale output current. The differential linearity errors of the DACs are guaranteed to be a maximum of 1.0 LSB over the full temperature range. The device is available in a 52- lead QFP package over the commercial temperature range.

UA798HM

Vendor:FSC

This is a bidirectional pin used to transfer addresses and data into and out of the device. It is an open drain terminal. Therefore, the SDA bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz).

UA798HM

Vendor:CAN8Package Cooled:1080D/C:FSC

This is a bidirectional pin used to transfer addresses and data into and out of the device. It is an open drain terminal. Therefore, the SDA bus requires a pull-up resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz and 1 MHz).

UA798HMQB

Tokyo and Stockholm, July 15 -- Sony and Ericsson today announced the financial summary for the second quarter, ended June 30, 2003 of Sony Ericsson Mobile Communications AB, the 50:50 joint venture of Sony and Ericsson. The company reported improved operating results and a strong increase in sales and shipments for its two core business areas; GSM and Japanese standards.

UA798S

Package Cooled:SOP-8

400 MSPS Internal Clock Speed Integrated 14-bit D/A Converter Programmable phase/amplitude dithering 32-bit Tuning Word Phase Noise <= -125 dBc/Hz @ 1KHz offset (DAC output) Excellent Dynamic Performance 80dB SFDR @ 130MHz (+/- 100KHz Offset) Aout Serial I/O Control 1.8V Power Supply Software and Hardware controlled power down 48-lead EPAD-TQFP package Linear and non-linear frequency sweeping cap...

UA798TC

Vendor:F

(18) System clock divider • Low power consumption operation is available • Minimum instruction cycle time (300ns, 600ns, 1.2µs, 2.4µs, 4.8µs, 9.6µs, 19.2µs, 38.4µs, 76.8µs can be switched by program (when using 10MHz main clock)

UA79C

Vendor:N/APackage Cooled:DIPD/C:06+

Logic 0 Input Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current

UA79C

Vendor:N/APackage Cooled:DIPD/C:06+

Logic 0 Input Bias Current VBS Supply Undervoltage Positive Going Threshold VBS Supply Undervoltage Negative Going Threshold VCC Supply Undervoltage Positive Going Threshold VCC Supply Undervoltage Negative Going Threshold Output High Short Circuit Pulsed Current Output Low Short Circuit Pulsed Current

UA79GKC

Vendor:FAIPackage Cooled:CAN4D/C:05+

The ISD1810 devices offer single-chip solutions with 8 to 16 seconds of record/playback duration capacity. Sampling rate and duration are deter- mined by an external resistor connected to the ROSC pin. These specifications apply with the re- quired resistor value for 10-second minimum play- back duration.

UA79HG

Package Cooled:四脚铁帽D/C:02+/03

APPLICATIONS Microphone Preamplifier/Processor Computer Sound Cards Public Address/Paging Systems Communication Headsets Telephone Conferencing Guitar Sustain Effects Generator Computerized Voice Recognition Surveillance Systems Karaoke and DJ Mixers

UA79HGSC

Vendor:045+(advantage)D/C:N/A

The CLC425's combination of ultra-low noise, wide gain-band- width, high slew rate and low dc errors will enable applications in areas such as medical diagnostic ultrasound, magnetic tape & disk storage, communications and opto-electronics to achieve maximum high-frequency signal-to-noise ratios.

UA79HGSM

Vendor:FSCD/C:０４＋

These amplifiers may be used in applications such as high speed integrators, fast D/A converters, sample and hold circuits and many other circuits requiring low input offset voltage, low input bias current, high input impedance, high slew rate and wide bandwidth. The devices also exhibit low noise and offset voltage drift.

UA79L05AD

Vendor:TIPackage Cooled:ti

Flexible Logic Resources - Up to 93,184 internal registers / latches with Clock Enable - Up to 93,184 look-up tables (LUTs) or cascadable 16-bit shift registers - Wide multiplexers and wide-input function support - Horizontal cascade chain and Sum-of-Products support - Internal 3-state bussing

UA79L05CAPK

Vendor:TIPackage Cooled:SOT-89D/C:05+

Table 2 above describes 3 different groups of frequencies. Within the same group, frequency may be switched through SMBus byte 0 without causing any glitching or clock discontinuity at the CPU(0:2) outputs, therefore allowing frequency smooth switching of the clock. Switching frequency from one group to another is permitted but will cause the CPU(0:2) clocks to jump immediately to the next frequency. (n...

UA79L05CAPK

Vendor:TIPackage Cooled:SOT-89D/C:05+

Table 2 above describes 3 different groups of frequencies. Within the same group, frequency may be switched through SMBus byte 0 without causing any glitching or clock discontinuity at the CPU(0:2) outputs, therefore allowing frequency smooth switching of the clock. Switching frequency from one group to another is permitted but will cause the CPU(0:2) clocks to jump immediately to the next frequency. (n...

UA79L08CAPK

Vendor:TIPackage Cooled:SOT-89D/C:05+

PCI configuration space is a limited address space, which is used for system enumeration and initialization. This address space is a very low performance communication mode between the processor and PCI devices. The ADSP-BF535 Blackfin processor provides a one-value window to access a single data value at any address in PCI configuration space. This window is fixed and receives the address of the value...

UA79L08CAPK

Vendor:TIPackage Cooled:SOT-89D/C:05+

PCI configuration space is a limited address space, which is used for system enumeration and initialization. This address space is a very low performance communication mode between the processor and PCI devices. The ADSP-BF535 Blackfin processor provides a one-value window to access a single data value at any address in PCI configuration space. This window is fixed and receives the address of the value...

UA79L15ACP

Vendor:tiPackage Cooled:tiD/C:dc03

1. Test conditions unless otherwise noted: 25º C, Supply Voltage = +6 V, Rbias = 16.5 , 50 System. 2. 3OIP measured with two tones at an output power of +4 dBm/tone separated by 1 MHz. The suppression on the largest IM3 product is used to calculate the 3OIP using a 2:1 rule. 3. Large-signal gain is tested with an input power level of +4 dBm.

UA79M

UA79M05

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect re- liability.

UA79M05AHC

Vendor:FAIPackage Cooled:CAN3

The HYM71V75S3201 N-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 256Mbytes memory. The HYM71V75S3201 N-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. The DIMM /CAS latency in...

UA79M05H/883

Vendor:FPackage Cooled:2005

UA79M05HC

Vendor:FD/C:08+

Notes: 1. All typical values are at 25C and with a 3.3V supply 2. tsk(p) is the magnitude of the time difference between the high-to-low and low-to-high propagation delay times at an output. 3. fmax generator input conditions: 50% duty cycle, 200mV, Output criteteria: 45% to 55% duty cycle, VOD 250mV

UA79M05HM

Vendor:5D/C:N/A

The Contek LM79XX series of three-terminal negative regulators are available in TO-220 package and with several fixed output voltage, making them useful in a wide range of application. Each type employs internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible.

UA79M05HM

Vendor:5D/C:N/A

The Contek LM79XX series of three-terminal negative regulators are available in TO-220 package and with several fixed output voltage, making them useful in a wide range of application. Each type employs internal current limiting, thermal shut-down and safe area protection, making it essentially indestructible.

UA79M05MH

Vendor:FD/C:1104

The NT7702 is a 240-bit output segment/common driver LSI suitable for driving large scale dot matrix LCD panels using as PDA/personal computers/work stations. Through the use of SST (Super Slim TCP) technology, it is ideal for substantially decreasing the size of the frame section of the LCD module. The NT7702 is good as both a segment driver and as a common driver, and a low power consuming, high-

UA79M05MJG

Vendor:TIPackage Cooled:CDIP8D/C:00+

FEATURES (CONTINUED) Single Instruction Multiple Data (SIMD) Architecture Provides: Two Computational Processing Elements Concurrent ExecutionEach Processing Element Executes the Same Instruction, but Operates on Different Data Code Compatibilityat Assembly Level, Uses the Same Instruction Set as the ADSP-2106x SHARC DSPs Parallelism in Buses and Computational Units Allows: Single-cycle Exe...

UA79M05MJG

Vendor:TIPackage Cooled:CDIP8D/C:00+

FEATURES (CONTINUED) Single Instruction Multiple Data (SIMD) Architecture Provides: Two Computational Processing Elements Concurrent ExecutionEach Processing Element Executes the Same Instruction, but Operates on Different Data Code Compatibilityat Assembly Level, Uses the Same Instruction Set as the ADSP-2106x SHARC DSPs Parallelism in Buses and Computational Units Allows: Single-cycle Exe...

UA79M05MJGB

Vendor:TID/C:89

The B9946 is capable of generating 1X and 1/2X signals from a 1X source. These signals are generated and retimed inter- nally to ensure minimal skew between the 1X and 1/2X sig- nals. SEL(A:C) inputs allow flexibility in selecting the ratio of 1X to1/2X outputs.

UA79M05MJGB

Vendor:TIPackage Cooled:DIP陶瓷8脚D/C:89

The B9946 is capable of generating 1X and 1/2X signals from a 1X source. These signals are generated and retimed inter- nally to ensure minimal skew between the 1X and 1/2X sig- nals. SEL(A:C) inputs allow flexibility in selecting the ratio of 1X to1/2X outputs.

UA79M08

Vendor:.Package Cooled:2005D/C:500

UA79M08AHC

Vendor:FD/C:08+

In order to specify each device for true worst case operat- ing conditions all timing parameters are guaranteed while the chip is driving the capacitive load of 88 DRAMs includ- ing trace capacitance The chips delay timing logic makes use of a patented new delay line technique which keeps A C skew to g3 ns over the full VCC range of g10% and temperature range of b55 C to a 125 C The DP8417 DP8418 DP8419...

UA79M08AHC

Vendor:FD/C:08+

In order to specify each device for true worst case operat- ing conditions all timing parameters are guaranteed while the chip is driving the capacitive load of 88 DRAMs includ- ing trace capacitance The chips delay timing logic makes use of a patented new delay line technique which keeps A C skew to g3 ns over the full VCC range of g10% and temperature range of b55 C to a 125 C The DP8417 DP8418 DP8419...

UA79M12HMQB

Vendor:FAIPackage Cooled:CAN3

As address generators, the IALUs perform immediate or indi- rect (pre- and post-modify) addressing. They perform modulus and bit-reverse operations with no constraints placed on mem- ory addresses for the modulus data buffer placement. Each IALU can specify either a single-, dual-, or quad-word access from memory.

UA79M15AUC

Vendor:KOREAD/C:82+

(*) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC

UA79M15HMQB

Vendor:N/APackage Cooled:2005D/C:08+09+

a8237 MegaCore function implementing a programmable direct memory access (DMA) controller Optimized for FLEX® architecture Provides four independent channels Offers static read/write or handshaking modes Includes direct bit set/reset capability Uses approximately 1,201 FLEX logic elements (LEs) Functionally based on the Intel 8237A and Harris 82C37A devices, except as noted in Variations & Clar...

UA79M15HMQB

Vendor:FPackage Cooled:N/AD/C:1104

a8237 MegaCore function implementing a programmable direct memory access (DMA) controller Optimized for FLEX® architecture Provides four independent channels Offers static read/write or handshaking modes Includes direct bit set/reset capability Uses approximately 1,201 FLEX logic elements (LEs) Functionally based on the Intel 8237A and Harris 82C37A devices, except as noted in Variations & Clar...