Index "U"Vendor:NICHICONPackage Cooled:18*31.5D/C:07+
Vendor:NICHICONPackage Cooled:5*11D/C:07+
Vendor:NICHICONPackage Cooled:18*35.5D/C:07+
Vendor:NICHICONPackage Cooled:8*15D/C:07+
Vendor:NICHICONPackage Cooled:16*35.5D/C:07+
Vendor:NICHICONPackage Cooled:6.3*11D/C:07+
Vendor:NICHICONPackage Cooled:6.3*11D/C:07+
Vendor:NICHICONPackage Cooled:10*25D/C:07+
Vendor:UNIVERSE ?Package Cooled:05+?D/C:1847
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum (2) All unused digital inputs of the device must be held at V+ or GND to ensure proper device operation. Refer to the TI application report, Implications
Vendor:NICHICONPackage Cooled:6.3*11D/C:07+
Vendor:NICHICONPackage Cooled:18*15D/C:07+
Vendor:NICHICONPackage Cooled:8*11.5D/C:07+
Vendor:NICHICONPackage Cooled:10*12.5D/C:07+
Vendor:NICHICONPackage Cooled:16*31.5D/C:07+
Vendor:NICHICONPackage Cooled:18*25D/C:07+
Vendor:NICHICONPackage Cooled:10*20D/C:07+
Vendor:NICHICONPackage Cooled:16*40D/C:07+
Vendor:NICHICONPackage Cooled:6.3*11D/C:07+
Vendor:NICHICONPackage Cooled:5*11D/C:07+
Vendor:NICHICONPackage Cooled:10*15D/C:07+
Vendor:NICHICONPackage Cooled:12.5*20D/C:07+
Vendor:NICHICONPackage Cooled:8*11.5D/C:07+
Vendor:NICHICONPackage Cooled:10*20D/C:07+
Vendor:NICHICONPackage Cooled:16*25D/C:07+
Vendor:NICHICONPackage Cooled:10*15D/C:07+
Vendor:NICHICONPackage Cooled:10*20D/C:07+
Vendor:NICHICONPackage Cooled:10*12.5D/C:07+
Vendor:NICHICONPackage Cooled:18*35.5D/C:07+
Vendor:NICHICONPackage Cooled:12.5*20D/C:07+
Vendor:NICHICONPackage Cooled:16*25D/C:07+
Vendor:IPD(USA)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. e-trim is a trademark of Texas Instruments, Incorporated. All other trademarks are the property of their respective owners.
Vendor:IPD(USA)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. e-trim is a trademark of Texas Instruments, Incorporated. All other trademarks are the property of their respective owners.
Vendor:QFPPackage Cooled:NEC
Vendor:SANYOPackage Cooled:QFP/80D/C:1995
We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: mcdocu.comments@infineon.com
Vendor:NECD/C:03+
Vendor:USSIPackage Cooled:PLCC-68D/C:02+
• Fast access time: 7, 8, 10, 12 ns • CMOS low power operation: 150/130/105/95 mA at minimum cycle time • Single 3.3 V power supply • All inputs and outputs are TTL-compatible • Byte control • Fully static operation • Industrial Temperature Option: C40 to 85C • Package line up J: 400 mil, 44-pin SOJ package TP: 400 mil, 44-pin TSOP Type II package...
Vendor:USSIPackage Cooled:PLCCD/C:06+
Size (max.): HR151 and HR152 models, case H6 2.125 x 1.125 x 0.495 inches (53.98 x 28.58 x 12.57 mm) HR153 models, case F4 1.950 x 1.350 x 0.505 inches (49.53 x 34.29 x 12.83 mm) See section B8, cases F4 and H6 for dimensions. Weight:HR151 and HR152: 50 grams typical. HR153: 53 grams typical. Screening: Standard only. See Section C2 for screening description.
Vendor:ZIOLG
SNT-4A S-817A11APF-CUATFG S-817A12APF-CUBTFG S-817A13APF-CUCTFG S-817A14APF-CUDTFG S-817A15APF-CUETFG S-817A16APF-CUFTFG S-817A17APF-CUGTFG S-817A18APF-CUHTFG S-817A19APF-CUITFG S-817A20APF-CUJTFG S-817A21APF-CUKTFG S-817A22APF-CULTFG S-817A23APF-CUMTFG S-817A24APF-CUNTFG S-817A25APF-CUOTFG S-817A26APF-CUPTFG S-817A27APF-CUQTFG S-817A28APF-CURTFG S-817A29APF-CUSTFG S-817A30APF-CUTTFG S-817A31A...
Package Cooled:脚大脚小D/C:08+
Notes: 1 Monitoring time is the time from the last pulse (negative edge) of the timer clear clock pulse until reset pulse output. In other words, reset output is output if a clock pulse is not input during this time. 2 Reset time means reset pulse width. However, this does not apply to power ON reset. 3 Reset hold time is the time from when VCC exceeds detection voltage (VSH) during power ON reset until ...
Package Cooled:脚大脚小D/C:08+
Notes: 1 Monitoring time is the time from the last pulse (negative edge) of the timer clear clock pulse until reset pulse output. In other words, reset output is output if a clock pulse is not input during this time. 2 Reset time means reset pulse width. However, this does not apply to power ON reset. 3 Reset hold time is the time from when VCC exceeds detection voltage (VSH) during power ON reset until ...
Vendor:microuspdPackage Cooled:microuspdD/C:dc
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs, which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half an hour), the UPR05TR13 uses electrical erasure. Generally, the chip can be erased within 100 mS by using an EPROM writer with a special erase algorithm.
Vendor:OND/C:O9+
All parameters having min/max specifications are guaranteed. The Test Level column indi- cates the specific device testing actually per- formed during production and Quality Assur- ance inspection. Any blank section in the data column indicates that the specification is not tested at the specified condition.
Vendor:PHIPackage Cooled:DIP-L24PD/C:DIP-L24P
Vendor:PHIPackage Cooled:DIP-L24PD/C:6+
Optimizing the controller and the synchronous FETs results in the highest conversion efficiency over a wide load range at the switching frequencies of interest (1 MHz or greater). It also minimizes the overshoot and gate ringing associated with drive current and gate charge mismatches.
Vendor:PHIPackage Cooled:DIP-L24PD/C:6+
• Serial Presence Detect with Serial E2PROM • Two Register Buffers & one Inverter used (with PLL) • Supports Flow-through or Register mode by Pin No. 147 (REGE) • Meets all the other JEDEC specifications • Single 3.3V0.3V power supply • All device pins are LVTTL compatible • 8192 refresh cycles every 64ms
Vendor:PHIPackage Cooled:DIP-L24PD/C:6+
• Serial Presence Detect with Serial E2PROM • Two Register Buffers & one Inverter used (with PLL) • Supports Flow-through or Register mode by Pin No. 147 (REGE) • Meets all the other JEDEC specifications • Single 3.3V0.3V power supply • All device pins are LVTTL compatible • 8192 refresh cycles every 64ms
Vendor:PHIPackage Cooled:DIP-S16PD/C:6+
300 mA/1.9V/2.5V DC to DC for Co-processor Core 80 mA/2.8V Dual-mode LDO for Memories (LDO1) 130 mA/2.7V/2.8V LDO for Camera Module (LDO2) 130 mA/2.8V LDO for Analog Section Supply of Audio Stereo Codec (LDO6) 10 mA/1.8V/2.8V LDO for Digital Section Supply of Audio Stereo Codec (LDO7) 130 mA/2.8V LDO for Analog Section Supply of Bluetooth® Module (LDO4) 130 mA/2.8V LDO for Digital Section Supply of Blueto...
Copyright © 2003 SigmaTel, Inc. All rights reserved. All contents of this document are protected by copyright law and may not be reproduced without the express written consent of SigmaTel, Inc. SigmaTel, the SigmaTel logo, and combinations thereof are registered trademarks of SigmaTel, Inc. Other product names used in this pub- lication are for identification purposes only and may be trademarks or reg...
The MAX5878 is an advanced 16-bit, 250Msps, dual digital-to-analog converter (DAC). This DAC meets the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from +3.3V and +1.8V supplies, this dual DAC offers exceptional dynamic performance such as 76dBc spurious-free dynamic range (SFDR) at fOUT = 16MHz and suppor...
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herei...
UC3874-1 is designed for logic level MOSFETs and has UVLO turn-on and turn-off thresholds of 4.5V and 4.4V respectively. The UC3874-2 is designed for standard power MOSFETs and has UVLO turn-on and turn-off thresholds of 10V and 9V respectively. A precision 2.5V reference can supply 20mA to external circuitry. An error amplifier with soft start, high bandwidth current amplifier, and a synchronizable ...
Vendor:NICHICOND/C:00+
4. In the case of CMOS Output Type: The time interval between the rising edge of VDD input pulse from 0.7 V to (+VDET) +2.0 V and output voltage level becoming to VDD/2. In the case of N−Channel Open Drain Output Type: Output pin is pulled up with a resistance of 470 kW to 5.0 V, the time interval between the rising edge of VDD input pulse from 0.7 V to (+VDET) +2.0 V and output voltage level becomi...
The Fairchild Switch FST16211 provides 24-bits of high- speed CMOS TTL-compatible bus switching. The low On Resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
Vendor:CPCLAREPackage Cooled:05+D/C:DIP
Vendor:CPCLAREPackage Cooled:91D/C:672
The on-chip 264-bit EEPROM (8 block, 33 bits each) can be read and written block wise from the base station. The blocks can be protected against overwriting by using lock bits. One block is reserved for setting the operation modes of the IC. Another block con- tains a password to prevent unauthorized writing.
Package Cooled:DIP
1024 bits, 16 kbits or 64 kbits Electrically Programmable Read Only Memory (EPROM) communicates with the economy of one signal plus ground Unique, factory-lasered and tested 64-bit registration number (8-bit family code, 36-bit serialization, 12-bit UniqueWare identifier 5E7H, 8-bit CRC-tester) assures absolute traceability because no two parts are alike. Built-in multidrop controller ens...
Vendor:CP-CLAREPackage Cooled:原装
The IRU1010-18 is a low dropout three-terminal fixed out- put regulator with minimum of 1A output current capabil- ity. This product is specifically designed to provide well regulated supply for low voltage IC applications as well as generating clock supply for PC applications. The IRU1010-18 is guaranteed to have <1.3V dropout at full load current making it ideal to provide well regulated with 3.8V input...
Vendor:CP-CLAREPackage Cooled:原装
The IRU1010-18 is a low dropout three-terminal fixed out- put regulator with minimum of 1A output current capabil- ity. This product is specifically designed to provide well regulated supply for low voltage IC applications as well as generating clock supply for PC applications. The IRU1010-18 is guaranteed to have <1.3V dropout at full load current making it ideal to provide well regulated with 3.8V input...
Vendor:LCLARE
Three-phase bipolar drive Direct PWM drive Built-in forward/reverse switching circuit Full complement of built-in protection circuits, including current limiter, undervoltage protection circuit, motor lockup protection circuit, and thermal protection circuit. • Can be controlled by either a command voltage or the duty of an input PWM signal. • Provides three types of Hall-effect el...
Package Cooled:2988
For proper operation, a 0.1µF or greater bypass capacitor must be used between VDD and VSS; the bypass cap should be placed very close to the device pins. The PCB should if possible include a copper pour under and around the IC, but not extensively under the SNS pins or lines.
CS is a Chip select for the device to activate the serial control port.The CS doesnt impact any of the other interface ports and signals, i.e. the TX or RX ports and interface signals. This is an active low signal. When inactive SD, SCLK, AS and R/W become dont care signals.
Package Cooled:TQFP1010-64D/C:01+
Connecting the inhibit input (Pin 2) to input common (Pin 10) will cause the converter to shut down. It is recommended that the inhibit pin be driven by an open collector device capable of sinking at least 400µA of current. The open cir- cuit voltage of the inhibit input is 11.5 1 VDC.
Vendor:UNIPACD/C:4
Ultrasonically bonded leads and controlled die mount techniques are utilized to further increase the SOA capability and inherent reliability of these devices. The temperature range to 200 C permits reliable operation in high ambients, and the hermetically sealed package insures maximum reliability and long life.
Package Cooled:02D/C:820
The Si91821 is a 300-mA CMOS LDO (low dropout) voltage regulator. The device features ultra low ground current and dropout voltage to prolong battery life in portable electronics. The Si91821 offers line and load transient response and ripple rejection superior to that of bipolar or BiCMOS LDO regulators. The device is designed to maintain regulation while delivering 500-mA peak current. This is useful...
Vendor:AUPackage Cooled:QFP64D/C:04+
Vendor:STPackage Cooled:03+
These TTL encoders feature priority decoding of the inputs to ensure that only the highest-order data line is encoded. The 147 and LS147 devices encode nine data lines to four-line (8-4-2-1) BCD. The implied decimal zero condition requires no input condition, as zero is encoded when all nine data lines are at a high logic level. The 148 and LS148 devices encode eight data lines to three-line (4-2-1) binar...
Package Cooled:脚大脚小D/C:08+
The HYM72V64C736T4M Series are Dual In-line Memory Modules suitable for easy interchange and addition of 512Mbytes mem- ory. The HYM72V64C736T4M Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and out- puts are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
The four high order bits define the instruction. The next two bits (R1 and R0) select one of the four registers that is to be acted upon when a register oriented instruction is issued. The last two bits (P1 and P0) select which one of the two potentiometers or which one of the two voltage comparators is to be affected by the instruction.
Package Cooled:D0216-AA
The four high order bits define the instruction. The next two bits (R1 and R0) select one of the four registers that is to be acted upon when a register oriented instruction is issued. The last two bits (P1 and P0) select which one of the two potentiometers or which one of the two voltage comparators is to be affected by the instruction.
D/C:07+
• Available on Both Encoder Modules (HEDS-9000 Series) and Encoder Kit Housing (HEDS-5500 Series) • Complementary Outputs • Industry Standard Line Driver IC • Single 5 V Supply • Onboard Bypass Capacitor • 70C and 100C Versions Available
Vendor:AUPackage Cooled:QFPD/C:03+
address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDTs CMOS high-performance technology, these devices typically operate on only 27mW of power. The IDT70P258/248 is packaged in a 100 ball 0.5mm-...
Vendor:FUJ.Package Cooled:1000D/C:05+
500V, 50 Amp Capability at 110C Fully Isolated Bridge Ultra Low Thermal Resistance Integral Free Wheeling Fast Recovery Epitaxial Diode (FRED) Self-Contained, Smart Lowside/Highside Drive Circuitry and Isolated Supply Adjustable Deadtime Capable of Switching Frequencies to 20KHz Isolated Case Allows Direct Heat Sinking; On Board Temp Sensor Case Bolt-down Design Allows Superior Heat Dissipation
Vendor:AUD/C:1
The device is manufactured using Atmels high-density CMOS technology. By combin- ing the ARM7TDMI processor core with a large on-chip high-speed SRAM and a wide range of peripheral functions on a monolithic chip, the UPS161 is a powerful microcontroller that offers a flexible and high-performance solution to many compute- intensive embedded control applications.
D/C:1000