Index "U"Vendor:MOSPECPackage Cooled:TO-220ABD/C:03+
Virtex-II devices are user-programmable gate arrays with various configurable elements. The Virtex-II architecture is optimized for high-density and high-performance logic designs. As shown in Figure 1, the programmable device is comprised of input/output blocks (IOBs) and internal configurable logic blocks (CLBs).
Package Cooled:TO-220ABD/C:TO
The AD581 can also be used in a two-terminal mode to develop a positive reference. VIN and VOUT are tied together and to the positive supply through an appropriate supply resistor. The per- formance characteristics will be similar to those of the negative two-terminal connection. The only advantage of this connection over the standard three-terminal connection is that a lower pri- mary supply can be used...
Vendor:MOSPECPackage Cooled:05无铅D/C:03+
The AD581 can also be used in a two-terminal mode to develop a positive reference. VIN and VOUT are tied together and to the positive supply through an appropriate supply resistor. The per- formance characteristics will be similar to those of the negative two-terminal connection. The only advantage of this connection over the standard three-terminal connection is that a lower pri- mary supply can be used...
Package Cooled:05无铅D/C:TO
Analog signals at the input (Vx) are firstly bandlimited to 508 kHz by an RC lowpass filter section. This performs the necessary anti-aliasing for the following first-order sampled data lowpass pre-filter which is clocked at 512 kHz. This further bandlimits the signal to 124 kHz before a fifth-order elliptic lowpass filter, clocked at 128 kHz, provides the 3.4 kHz bandwidth required by the encoder section. A ...
Vendor:MOSPECPackage Cooled:05无铅D/C:03+
MAS9162 is a low dropout voltage regulator with an enable/disable pin, which allows device to be turned off or on by pulling control to low or high. No external bypass capacitor is needed for achieving the low noise level of 30 µVrms. In addition to the noise levels, MAS9162 excels in dropout voltage (95 mV typical at 50 mA) and in start-up time (typically 10 µs from start-up to within ...
Package Cooled:05无铅D/C:TO
MAS9162 is a low dropout voltage regulator with an enable/disable pin, which allows device to be turned off or on by pulling control to low or high. No external bypass capacitor is needed for achieving the low noise level of 30 µVrms. In addition to the noise levels, MAS9162 excels in dropout voltage (95 mV typical at 50 mA) and in start-up time (typically 10 µs from start-up to within ...
Vendor:MOSPECPackage Cooled:TO-220ABD/C:03+
• High speed 15 ns • Fast tDOE • Low active power 715 mW • Low standby power 220 mW • CMOS for optimum speed/power • Easy memory expansion with CE1, CE2, and OE features • TTL-compatible inputs and outputs • Automatic power-down when deselected
Vendor:MOSPECPackage Cooled:TO-220ABD/C:03+
Output Over-Voltage Protection The PT4470/80 series of DC/DC converters incorporate circuitry that continually senses the output for an over- voltage (OV) condition. The OV threshold automatically tracks the VID output voltage program setting to a level 25% higher than that programmed at the control pins, VID0 through VID4. If the converter output voltage exceeds the OV threshold, the converter is imm...
Vendor:MOSPECPackage Cooled:TO-220ABD/C:03+
The two ACCESS.bus (ACB) interface modules support a two-wire serial interface compatible with the ACCESS.bus physical layer. It is also compatible with Intels System Man- agement Bus (SMBus) and Philips I2C bus. The ACB mod- ules can be configured as a bus master or slave, and they can maintain bidirectional communications with both multi- ple master and slave devices.
Vendor:STPackage Cooled:SOP
Four 16-Bit CMOS ADC Input Ports Programmable Closed Loop VGA Control With 6-Bit Outputs for Each ADC Input Port Provide Received Total Wide Band Power (RTWP) Measurement for the Composite Power Across Carriers With Programmable Time Window for Measurement 8 UMTS Digital Down Converter (DDC) Channels or 16 CDMA or 16 TD-SCDMA DDC Channels With Programmable 18 Bit Filter Coefficients Each DDC channel incl...
Vendor:MOTOPackage Cooled:TO-220D/C:01/98+
This mode achieves moderate locking times (typically 5 seconds, worst case 10 seconds) with the advantage that the ACS102s are configured as peers. Communicating modems may be permanently configured in this mode by hard wiring the DM pins.
Package Cooled:TO220
The regulator voltage output used to power the load. A nominal output capacitor of 10uF is suffi- cient to minimize any transient disturbances under normal operating conditions. Additional output capacitance can be used to further improve transient load response.
Vendor:MOTPackage Cooled:93D/C:TO-220
RESET FLAG Proper operation of the RESET circuity is not guaranteed for VIN voltages of less than 2.0V. The RESET pin will provide information on the status of the regulator VOUT voltage level. Any condition that causes the VOUT voltage to drop to typi- cally 89% normal would cause the RESET pin to go low. This will warn of a system Vcc supply that may cause abnormal operation. Of course, when the re...
High resolution ADC 24 bits no missing codes 0.0025% nonlinearity Optimized for fast channel switching 18-bit p-p resolution (21 bits effective) at 500 Hz 16-bit p-p resolution (19 bits effective) at 2 kHz 14-bit p-p resolution (18 bits effective) at 15 kHz On-chip per channel system calibration 4 single-ended analog inputs Input ranges +5 V, 5 V, +10 V, 10 V Overvoltage tolerant Up to 16.5...
Vendor:JECS
Vendor:MOTD/C:N/A
DESCRIPTION Siemens Solid State Relays (SSRs) are miniature, optically-coupled relays with high-voltage MOSFET outputs. The relays are capable of switching ac or dc loads from as little as nanovolts to hundreds of volts. Likewise, the relays can switch currents in the range of nanoamps to hundreds of milli- amps. The MOSFET switches are ideal for small signal switching and are primarily suited for dc or audio...
Vendor:PIICPackage Cooled:PLCC68LD/C:9738
General Notes: 1. Units in the JPM-A series of Quadraphase Modulators are composed of two biphase modulators, a 90 quadrature hybrid and an in-phase power combiner. 2. These devices are generally used in systems to generate QPSK coded signals. The units accept two differential data inputs each of which independently biphase modulates an RF carrier. These are then combined to produce a quadraphase output of 0...
Vendor:ONPackage Cooled:onD/C:50
The tri-mode (1X/1.5X/2X) operation of the internal charge pump offers excellent power efficiency for both flash and movie modes. Combined with a low external parts count (two 1µF flying capacitors and one small bypass capacitor at VIN and OUT), the U1660 is ideally suited for small, battery-powered applications.
Package Cooled:TO-220D/C:TO
Vendor:MOSPECPackage Cooled:TO-220D/C:03+
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. V+ and V- can have a maximum magnitude of +7V, but their absolute addition can not exceed 13 V.
Package Cooled:TO-220D/C:TO
KEY FEATURES 350 MHz High Performance Blackfin Processor Core Two 16-Bit MACs, Two 40-Bit ALUs, One 40-Bit Shifter, Four 8-Bit Video ALUs, and Two 40-Bit Accumulators RISC-Like Register and Instruction Model for Ease of Programming and Compiler Friendly Support Advanced Debug, Trace, and Performance Monitoring 1.0 VC1.6 V Core VDD with Dynamic Power Management 3.3 V I/O 260-Ball PBGA Package
Vendor:MOSPECPackage Cooled:TO-220D/C:03+
The CPU core of MTV230M is compatible with the industry standard 8051, which includes 256 bytes RAM, Special Function Registers (SFR), two timers, five interrupt sources and serial interface. The CPU core fetches its program code from the 64K bytes Flash in MTV230M. It uses Port0 and Port2 to access the external special function register (XFR) and external auxiliary RAM (AUXRAM). The CPU core can run at doub...
Vendor:symbolPackage Cooled:symbolD/C:dc91
Notes: 5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 30-pF load capacitance. 6. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 7. tHZOE, tHZBE, tHZCE, and tHZWE are spec...
Vendor:MOSPECD/C:08+
Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Unless otherwise noted, all voltages are referenced to GND. The limits for the parameters specified herein shall apply over the full specified VCC range and case temperature range of -55C to +125C. For TC = +100C to +125C, derate li...
Vendor:MOSPECPackage Cooled:05无铅D/C:03+
RT pin provides oscillator switching frequency adujstment. By connecting a resistor (RT) from this pin to GND, the nominal 200kHz switching frequency is increased. Conversely. connecting a pull-up re- sistor (RT) from this pin to VCC reduces the switching frequency.
Package Cooled:TO-220D/C:TO
Device types identified as current may not be a first choice for new designs, but will continue to be available because of the popularity and/or standardization or volume usage in current production designs. These products can be acceptable for new designs but the preferred types are considered better alternatives for long term usage.
Package Cooled:TO-220D/C:TO
Typ. Max. UnitsConditions CCC CCCVVGS = 0V, ID = -250µA -0.013 CCC V/C Reference to 25C, ID = -1mA CCC 0.042VGS = -4.5V, ID = -12A „ CCC 0.062WVGS = -2.7V, ID = -10A „ CCC 0.075VGS = -2.5V, ID = -10A „ CCC -1.0VVDS = VGS, ID = -250µA CCC CCCSVDS = -15V, ID = -12A CCC -25VDS = -20V, VGS = 0V µA CCC -250VDS = -16V, VGS = 0V, TJ = 150C CCC 500VGS = -8.0V...
Vendor:MOSPECPackage Cooled:TO-220D/C:03+
The IS24CXX contains an internal address counter which maintains the address of the last byte accessed, incremented by one. For example, if the previous operation is either a read or write operation addressed to the address location n, the internal address counter would increment to address location n+1. When the IS24CXX receives the Device Addressing Byte with a READ operation (read/write bit set to...
Vendor:MOSPECPackage Cooled:05无铅D/C:03+
The IS24CXX contains an internal address counter which maintains the address of the last byte accessed, incremented by one. For example, if the previous operation is either a read or write operation addressed to the address location n, the internal address counter would increment to address location n+1. When the IS24CXX receives the Device Addressing Byte with a READ operation (read/write bit set to...
A charge of over 2000 volts can accumulate on the human body or associated test equipment. A charge of this magni- tude can alter the performance or cause failure of the chip. When handling the accelerometer, proper ESD precautions should be followed to avoid exposing the device to dis- charges which may be detrimental to its performance.
Package Cooled:05无铅D/C:TO
The AD7683 is a 16-bit, charge redistribution, successive approximation, PulSAR™ analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.7 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes (B grade), an internal conversion clock, and a serial, SPI-compatible interface port. The part also contains a low noise, wide bandwid...
Vendor:MOSPECPackage Cooled:05无铅D/C:03+
The AD7683 is a 16-bit, charge redistribution, successive approximation, PulSAR™ analog-to-digital converter (ADC) that operates from a single power supply, VDD, between 2.7 V to 5.5 V. It contains a low power, high speed, 16-bit sampling ADC with no missing codes (B grade), an internal conversion clock, and a serial, SPI-compatible interface port. The part also contains a low noise, wide bandwid...
Vendor:tfkPackage Cooled:tfkD/C:dc95
The U175M also has an integrated blanking amplifier that takes a positive-going 5V input pulse, VBIN, and outputs a negative-going pulse, VBOUT, with a selectable amplitude of either 20VP-P or 40VP-P via the Pin 13 (S40) option. If Pin 13 is floated, the VBOUT pulse amplitude is 20VP-P; if Pin 13 is grounded, the amplitude is 40VP-P (see Figure 5). With a simple clamp circuit, this inverted pulse can ...
Integrates 7 line framers with ATM layer processing according to ATM Forum UNI and NNI Specifications UTOPIA Level 1 interface Internal framers for DS3, E3 (G.751, G.832), E4 (G.832), STS-1, STS-3c, STM-1 PLCP and G.804 HEC cell alignment for all data rates from 1.544 Mbps to 155 Mbps Direct interface to TAXITM or external T1/E1 framers ATM and SMDS cell modes 4 FIFO ports with header screening, forma...
Integrates 7 line framers with ATM layer processing according to ATM Forum UNI and NNI Specifications UTOPIA Level 1 interface Internal framers for DS3, E3 (G.751, G.832), E4 (G.832), STS-1, STS-3c, STM-1 PLCP and G.804 HEC cell alignment for all data rates from 1.544 Mbps to 155 Mbps Direct interface to TAXITM or external T1/E1 framers ATM and SMDS cell modes 4 FIFO ports with header screening, forma...
Vendor:MELEXISPackage Cooled:DIPD/C:08+
Vendor:STPackage Cooled:BGAD/C:00
Low I/O capacitance at 7pF typical In-system ESD protection to 15kV contact discharge, per the IEC 61000-4-2 international standard Two, three, four or five channels of ESD protection Compact SMT package saves board space and facilitates layout in space-critical applications Each I/O pin can withstand over 1000 ESD strikes Lead-free versions available
Vendor:STPackage Cooled:BGAD/C:00
Low I/O capacitance at 7pF typical In-system ESD protection to 15kV contact discharge, per the IEC 61000-4-2 international standard Two, three, four or five channels of ESD protection Compact SMT package saves board space and facilitates layout in space-critical applications Each I/O pin can withstand over 1000 ESD strikes Lead-free versions available
Vendor:INTELPackage Cooled:PLCC44
Package Cooled:PLCC32D/C:08+
Sensitivity describes the gain of the sensor and can be determined by applying 1g acceleration to it. As the sensor can measure DC accelerations this can be done easily by pointing the axis of interest towards the center of the earth, note the output value, rotate the sensor by 180 degrees (point to the sky) and note the output value again thus applying 1g acceleration to the sensor. Subtracting the larger...
Vendor:AMIPackage Cooled:PLCCD/C:99
Data DMA FIFO and command DMA FIFO with threshold control 16-bit slave mode for communication with host Pipelined DMA registers for efficient scatter and gather operations 32-bit DMA transfer counter for I/O transfer lengths of up to four gigabytes Support for subsystem ID Support for flash BIOS PROM
Vendor:AMIPackage Cooled:PLCCD/C:99
Data DMA FIFO and command DMA FIFO with threshold control 16-bit slave mode for communication with host Pipelined DMA registers for efficient scatter and gather operations 32-bit DMA transfer counter for I/O transfer lengths of up to four gigabytes Support for subsystem ID Support for flash BIOS PROM
Package Cooled:PLCC32
2. TVS devices are normally selected according to the working peak reverse voltage (VRWM), which should be equal or greater than the DC or continuous peak operating voltage level. 3. VBR is measured at pulse test current IT. 4. Non−repetitive current pulse per Figure 1 (Pin 5 to Pin 2)
Package Cooled:08+D/C:12000
Generates Programmable CPU Clock Output (50 MHz, 60 MHz, or 66 MHz) Generates 33-MHz Clock for Asynchronous PCI One 14.318-MHz Reference Clock Output All Output Clock Frequencies Derived From a Single 14.31818-MHz Crystal Input LVTTL-Compatible Inputs and Outputs Internal Loop Filters for Phase-Lock Loops Eliminate the Need for External Components Operates at 3.3-V VCC Package Options Include Plastic S...
Package Cooled:IORD/C:BGA
Vendor:NSPackage Cooled:TO-92D/C:00+
Vendor:TELEDYENED/C:08+
The AD5258 provides a compact, nonvolatile 3 mm 4.9 mm packaged solution for 64-position adjustment applications. These devices perform the same electronic adjustment function as mechanical potentiometers1 or variable resistors, but with enhanced resolution and solid-state reliability.
Vendor:TELEDYENEPackage Cooled:NOD/C:08+
The multiplexer for the SP8480 is identical in operation to many discrete devices available today, except that it has been integrated into the single-chip DAS. The appropriate channel is selected using the MUX address lines MA0, MA1, and MA2 per the truth table. The selected analog input is fed through to the ADC. The input impedance into any MUX channel will be on the order to 109 ohms, since it i...
Vendor:TELEDYENED/C:08+
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequenti...
Vendor:TIPackage Cooled:SMD
Many boards will not need any tuning capacitors, but for consistent long-term performance of a system, two load capacitor pads should be put into every design. What follows is the general procedure for tuning these load capacitors to match the specific board layout. Typically, the required capacitors will range from 0 to 4 pF.
Vendor:ROHMPackage Cooled:SSOP-B16
In the 5 pins configuration (PENTAWATT and PPAK) a Shutdown Logic Control function is available (pin 2, TTL compatible). This means that when the device is used as a local regulator, it is possible to put a part of the board in standby, decreasing the total power consumption. In the three terminal configuration the device has the same electrical performance, but is fixed in
Vendor:SILICONI
Vendor:SOP-4Package Cooled:SOP-4D/C:02+
With reference to WG 2 Resolution M33.31 in document N 2927, and WG 3 Resolution M12.11 in document N 2933, SC 2 instructs WG 2, in corporation with WG 3 to prepare a proposal to cover the requirements for Collection Identifiers for 10646 subsets and report to the next SC 2 Plenary. SC 2 further invites National Bodies and Liaison Organizations to communicate their needs to WG 2. SC 2 invites US and Canad...
Vendor:SHINDENGENPackage Cooled:SOT-89-2D/C:05+
REACTIVE LOADSAC SIGNALS Figure 6 shows the relationship of voltage and current in purely inductive load. The current lags the load voltage by 90. At peak current, the load voltage is zero. This means that the amplifier must deliver peak current with the full V+ across the conducting transistor (VC for negative half-cycle peak current). The situation is equally severe for a capacitive load. Check for t...
This input coupling capacitor blocks DC voltage at the amplifiers terminals. Combined with Ri, it creates a high pass filter with Ri at fc = 1/(2RiCi). Refer to the section, Proper Selection of External Components for an explanation of how to determine the value of Ci.
Vendor:TOSHIBAD/C:08+
The RF section comprises a mixer with image cancelling, followed by an IF band-pass filter at 660kHz, an AGC controlled gain stage and OOK and FSK demodulators, the desired modulation type being selectable by the SPI interface. The data output from the circuit may either be the data comparator output, or, if Data Manager is enabled, the SPI port.
D/C:07+
Specifications are for the differential output (OUTA C OUTA or OUTB C OUTB) of a single 2nd order section (A or B), gain = C2, RFIL = R11 = R21 = R31 = R12 = R22 = R32. All voltages are with respect to VGND = VGNDA = VGNDB. The q denotes the specifications which apply over the full operating temperature range, otherwise specifications and typical values are at TA = 25C. VS = single 5V, EN pin to logic low, RL...
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
General layout and supply bypassing play major roles in high frequency performance and thermal characteristics. Fairchild offers a demonstration board, FMS6400DEMO, to use as a guide for layout and to aid in device testing and characterization. The FMS6400DEMO is a 4-layer board with a full power and ground plane. For optimum results, follow the steps below as a basis for high frequency layout:
Vendor:TOSHIBA ?Package Cooled:N/A?D/C:1000
NOTES 1. Maximum alignment deviation between leads will not to be greater than 0.2mm. 2. Maximum non-cumulative variation between tape feed holes shall not exceed 1 mm in 20 pitches. 3. Holddown tape will not exceed beyond the edge(s) of carrier tape and there shall be no exposure of adhesive. 4. There will be no more than three (3) consecutive missing components in a tape. 5. A tape trailer, having at lea...
Vendor:DACOPackage Cooled:DO214-U1D
Vendor:TOSHIBAD/C:08+
Active low signal from ATM signifying that data will be sampled on RDAT[7:0] in the following clock cycle. When sampled high, RSOC and RDAT[7:0] are tristated, if TSEN is enabled. RRDENB must operate with RFCLK at high rate to prevent receive FIFO overflow and loss of receive data. Pin #: 68
Vendor:TOSHIBAPackage Cooled:SMBD/C:08+
Active low signal from ATM signifying that data will be sampled on RDAT[7:0] in the following clock cycle. When sampled high, RSOC and RDAT[7:0] are tristated, if TSEN is enabled. RRDENB must operate with RFCLK at high rate to prevent receive FIFO overflow and loss of receive data. Pin #: 68
Vendor:TOSHIBA
The DG2714 is a single-pole/double-throw monolithic CMOS analog switch designed for high performance switching of analog signals. Combining low power, high speed (tON: 28 ns, tOFF: 12 ns), low on-resistance (rDS(on): 0.85 W) and small physical size (SC70), the DG2714 is ideal for portable and battery powered applications requiring high performance and efficient use of board space.
Vendor:TOSHIBA
The DG2714 is a single-pole/double-throw monolithic CMOS analog switch designed for high performance switching of analog signals. Combining low power, high speed (tON: 28 ns, tOFF: 12 ns), low on-resistance (rDS(on): 0.85 W) and small physical size (SC70), the DG2714 is ideal for portable and battery powered applications requiring high performance and efficient use of board space.
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
The configurable non-multiplexed microprocessor port allows users to program various device operating modes and switching configurations. Users can employ the microprocessor port to perform register read/write, connection memory read/write, and data memory read operations. The port is configurable to interface with either Motorola or Intel-type microprocessors.
Vendor:TOSHIBAPackage Cooled:08+D/C:2000
temperature will exceed 125C when over-temperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 6: Guaranteed but not tested. Note 7: Maximum recommended SYNC frequency = 500kHz. Note 8: In applications where the VIN pin is supplied via an external RC network from a SYSTEM VIN > 25V, an external zener with clamp v...
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
The information in this document is subject to change without notice and should not be construed as a commitment by Cypress Semiconductor Corporation. While reasonable precautions have been taken, Cypress Semiconductor Corporation assumes no responsibility for any errors that may appear in this document.
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
The information in this document is subject to change without notice and should not be construed as a commitment by Cypress Semiconductor Corporation. While reasonable precautions have been taken, Cypress Semiconductor Corporation assumes no responsibility for any errors that may appear in this document.
Vendor:ToshibaPackage Cooled:Sod-6D/C:09+
Typical specifications represent average readings at +25C and VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. 3Code = 0x7F. 4Resistor terminals A and W have no l...
Vendor:ToshibaPackage Cooled:Sod-6D/C:09+
Typical specifications represent average readings at +25C and VDD = 5 V. Resistor position nonlinearity error R-INL is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. 3Code = 0x7F. 4Resistor terminals A and W have no l...
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:09+
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
To blink LEDs at periods greater than 1.6 second the bus master (MCU, MPU, DSP, chipset, etc.) must send repeated commands to turn the LED on and off as is currently done when using normal I/O Expanders like the Philips PCF8574 or PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose Parallel Input/Output (GPIO) expansion which provides a simple solution when additional I/...
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
To blink LEDs at periods greater than 1.6 second the bus master (MCU, MPU, DSP, chipset, etc.) must send repeated commands to turn the LED on and off as is currently done when using normal I/O Expanders like the Philips PCF8574 or PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose Parallel Input/Output (GPIO) expansion which provides a simple solution when additional I/...
Vendor:TODHIBAPackage Cooled:SOT-89D/C:05+
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Vendor:N/APackage Cooled:toshD/C:08+09+
Note: (1) The minimum DC input voltage is C0.5 V. During transitions, inputs may undershoot to C2.0 V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC + 0.5 V, which may overshoot to VCC + 2.0 V for periods of less than 20 ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or proc...
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:08+
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this device features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance ...
Vendor:TOSHIBAPackage Cooled:SOT-89D/C:09+
Vendor:N/APackage Cooled:N/AD/C:900
Vendor:TOSHIBAPackage Cooled:SMDD/C:92+
Vendor:TOSHIBAPackage Cooled:SOD-6D/C:09+
Vendor:TOSHIBAD/C:08+
The CKE input determines whether the CLK input is enabled. The next rising edge of the CLK signal will be valid when is CKE HIGH and invalid when LOW. When CKE is LOW, the device will be in either power-down mode, CLOCK SUSPEND mode, or SELF-REFRESH mode. CKE is an asynchronous input.
Vendor:TOSHIBA
PARAMETER Operating Supply Range Quiescent Current In Forward Regulation (Note 4) Quiescent Current While in Reverse Turn-Off. Current Drawn from VIN Quiescent Current While in Reverse Turn-Off. Current Drawn from VOUT VIN Current When VOUT Supplies Power Forward Turn-On Voltage (VIN C VOUT) Reverse Turn-Off Voltage (VOUT C VIN) Forward ON Resistance, ∆(VIN-VOUT)/∆(ILOAD) ON Resistance in Co...