VI-J6Z-CZ

Vendor:VICORPackage Cooled:84D/C:04+

g Our company makes a constant effort to improve the quality and reliability of our products. However, it is the customer's responsibility to provide safety. Take the appropriate steps to prevent personal injury, fire, and damage by providing redundancy equipment, fire containment equipment, and devices to protect personnel and equipment from operational mistakes.

VI-J6Z-E

Vendor:Vicor

accompanying wiring and circuits must be kept insulated and dry to avoid leakage and corrosion. This is especially true if the circuit may operate at cold temperatures where condensa- tion can occur. Printed-circuit coatings and varnishes such as Humiseal and epoxy paint or dips can be used to ensure that moisture cannot corrode the FM20 or its connections.

VI-J6Z-EX

Vendor:VICORPackage Cooled:84

The FLEx36 family includes 1M, 2M, 4M and 9M pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting independent, simultaneous access to any location in memory. The result of writing to the same location by more than one port at the same time is undefined. Registers on control, address, and data lines allow for minimal set-up and hold time.

VI-J6Z-EZ

Vendor:VICORPackage Cooled:84D/C:04+

Sector Protection A hardware method to lock a sector to prevent program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

VI-J6Z-EZ

Vendor:VICORPackage Cooled:84D/C:04+

Sector Protection A hardware method to lock a sector to prevent program or erase operations within that sector Sectors can be locked in-system or via programming equipment Temporary Sector Unprotect feature allows code changes in previously locked sectors

VI-J6Z-IW

Vendor:VICORPackage Cooled:84D/C:04+

Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intels Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel ...

VI-J6Z-IW

Vendor:VICORPackage Cooled:84D/C:04+

Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Intels Terms and Conditions of Sale for such products, Intel assumes no liability whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel ...

VI-J6Z-IX

Vendor:VICORPackage Cooled:84D/C:04+

VI-J6Z-IX

Vendor:VICORPackage Cooled:N/AD/C:300V/2V/30W

VI-J6Z-IY

Vendor:VICORPackage Cooled:N/AD/C:300V/2V/20W

Complete PowIRtrain integrated power stage Specification and operating instructions Bill of materials Electrical schematic Mechanical layout for Driver-Plus Board Software transferrable files for easy design integration Application information and layout considerations

VI-J6Z-IY

Vendor:VICORPackage Cooled:N/AD/C:04+

Complete PowIRtrain integrated power stage Specification and operating instructions Bill of materials Electrical schematic Mechanical layout for Driver-Plus Board Software transferrable files for easy design integration Application information and layout considerations

VI-J6Z-IZ

Vendor:VICORPackage Cooled:N/AD/C:04+

Notes a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at VCC = 12 V unless otherwise noted.

VI-J6Z-M

Vendor:Vicor

Description The ACPM-7833 is a fully matched CDMA Power amplifier module. Designed around Agilent Technologies new Enhancement Mode pHEMT process, the ACPM-7833 offers premium performance in a very small form factor. Fully matched to 50 Ohms on the input and output.

VI-J6Z-MX

Vendor:Vicor

The Hynix HYM76V4M655HG(L)T6 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 32Mbytes memory. The Hyundai HYM76V4M655HG(L)T6 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

VI-J6Z-MY

Vendor:Vicor

The Philips SA56004X is an SMBus compatible, 11-bit remote/local digital temperature sensor with over temperature alarms. The remote channel of the SA56004 monitors a diode junction, such as a substrate PNP of a microprocessor or a diode connected transistor such as the 2N3904 (NPN) or 2N3906 (PNP). With factory trimming, remote sensor accuracy of 1C is achieved.

VI-J70-03

Vendor:VICORPackage Cooled:MODULE

Note 3 tHAE is specd for case with HLD falling edge occurring at the latest time it can be accepted during the present CPU or DMA cycle being executed If HLD falling edge occurs later tHAE as long as (3 tC a 4 WS a 72 tC a 100) may occur depending on the following CPU instruction or DMA cycle its wait states and ready input

VI-J70-04

Vendor:VICORPackage Cooled:MODULE

The Sirenza Microdevices qualification process consists of a series of tests designed to stress various potential failure mechanisms. This testing is performed to ensure that Sirenza Microdevices products are robust against potential failure modes that could arise from the various die and package failure mechanisms stressed. The qualification testing is based on JEDEC test methods common to the semiconducto...

VI-J70-04

Vendor:VICORPackage Cooled:MODULE

The Sirenza Microdevices qualification process consists of a series of tests designed to stress various potential failure mechanisms. This testing is performed to ensure that Sirenza Microdevices products are robust against potential failure modes that could arise from the various die and package failure mechanisms stressed. The qualification testing is based on JEDEC test methods common to the semiconducto...

VI-J70-CY/F4

Vendor:VICORPackage Cooled:N/AD/C:05+

During the power-up sequence, internal logic checks the I2C- compatible port for the connection of an EEPROM whose first byte is either 0xC0 or 0xC2. If found, it uses the VID/PID/DID values in the EEPROM in place of the internally stored values (0xC0), or it boot-loads the EEPROM contents into internal RAM (0xC2). If no EEPROM is detected, FX2 enumerates using internally stored descriptors. The defaul...

VI-J70-CZ

Vendor:VICORPackage Cooled:MODULE

Agilents thin-Film Bulk Acoustic Resonator (FBAR) technology makes possible high-Q filters at a fraction their usual size. The excellent power handling of the bulk-mode resonators supports the high output powers needed in PCS handsets, with virtually no added distortion.

VI-J70-CZ/F4

Vendor:VICOR

VI-J70-EX

Vendor:VICORPackage Cooled:84D/C:04+

The transmitter section of the PI90SD1636A accepts 10-bit wide parallel TTL data and converts it to a high speed serial data stream. The parallel data is encoded in 8b/10b format. This incoming parallel data is latched into an input register, and synchronized on the rising edge of the 125 MHz reference clock supplied by the user. A phase locked loop (PLL) locks to the 125 MHz clock. The clock is then m...

VI-J70-EY

Vendor:VICORPackage Cooled:MODULED/C:04+

VREFL Lch Voltage Reference Output Pin, 3.75V Normally, connected to GNDL with a 10µF electrolytic capacitor and a 0.1µF ceramic capacitor. ZCAL Zero Calibration Control Pin This pin controls the calibration reference signal. CAL Calibration Active Signal Pin SMODE2 Serial Interface Mode Select Pin SMODE1 Serial Interface Mode Select Pin FSYNC Frame Synchronization Signal Pin

VI-J70-EY/F2

Vendor:VICORPackage Cooled:MODULE

This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVCHR162245 device is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bu...

VI-J70-EY/F2

Vendor:VICORPackage Cooled:MODULE

This 16-bit bus transceiver is built using advanced dual metal CMOS technology. The ALVCHR162245 device is designed for asynchronous communication between data buses. The control-function implementation minimizes external timing requirements. This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the A bus to the B bus or from the B bus to the A bu...

VI-J70-EZ

Vendor:VICORPackage Cooled:N/AD/C:04+

The fixed 2.5-V output controller uses an internal temperature-compensated bandgap reference centered at 1.2 V. Its tolerance is designed to be <2% over the specified temperature range, which, when coupled with the low offset of the driver circuit, allows the 2.5-V output to have a tolerance of 2% over the specified temperature range and full load.

VI-J70-EZ/S

Vendor:VICORPackage Cooled:MODULE

The device may be erased using the Automatic Erase algorithm. The Automatic Erase algorithm automati- cally programs the entire array prior to electrical erase. The timing and verification of electrical erase are controlled internal to the device.

VI-J70-EZ/S

Vendor:VICORPackage Cooled:MODULE

The device may be erased using the Automatic Erase algorithm. The Automatic Erase algorithm automati- cally programs the entire array prior to electrical erase. The timing and verification of electrical erase are controlled internal to the device.

VI-J70-IW

Vendor:VICORPackage Cooled:N/AD/C:04+

The TPS203x family of power distribution switches is intended for applications where heavy capacitive loads and short circuits are likely to be encountered. These devices are 50-mΩ N-channel MOSFET high-side power switches. The switch is controlled by a logic enable compatible with 5-V logic and 3-V logic. Gate drive is provided by an internal charge pump designed to control the power-switch rise ti...

VI-J70-IY

Vendor:VICORPackage Cooled:83

† The D package is available taped and reeled. Add the suffix R to the device type when ordering (e.g., TLC7705QDR). ‡ The PW package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TLC7705QPWLE).

VI-J70-IY

Vendor:VICORPackage Cooled:83

† The D package is available taped and reeled. Add the suffix R to the device type when ordering (e.g., TLC7705QDR). ‡ The PW package is only available left-end taped and reeled (indicated by the LE suffix on the device type; e.g., TLC7705QPWLE).

VI-J70-IZ

Vendor:VICORPackage Cooled:MODULED/C:03+

Note 13: Differential gain and differential phase measured for four series LM6361 op amps configured as unity-gain followers, in series with an LM6321 buffer. Error added by LM6321 is negligible. Test performed using Tektronix Type 520 NTSC test system.

VI-J70-MY

Vendor:VICORPackage Cooled:MODULE

Note 1: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The Recommended Operating Conditions table will define the conditions for actual device operation.

VI-J70-MZ

Vendor:Vicor

Operation at 500kHz allows the use of small magnetics and output capacitors. A SYNC input is featured to ease synchronization to an external clock. The EV kit provides cycle-by-cycle current-limit protection. Additional steady- state fault protection is provided by the integrating fault protection that reduces average dissipated power during continuous overload conditions. The MAX5069A also has a programmabl...

VI-J71-07/S

Vendor:VICORPackage Cooled:MODULE

Both versions can also be used as comparators. Differential inputs of VCC can be maintained without damage to the device. Open-loop propagation delay with TTL supply levels is typically 200 ns. This gives a good indication as to output stage saturation recovery when the device is driven beyond the limits of recommended output swing.

VI-J71-07S

VI-J71-CX

Vendor:VICORPackage Cooled:N/AD/C:04+

The 1/(fOSC)(C1) term in Equation 1 is the effective output resistance of an ideal switched capacitor circuit (Figures 2a, 2b). The losses in the circuit due to factor (4) above are also shown in Equation 2. The output voltage ripple is given by Equation 3.

VI-J71-CX

Vendor:VICORPackage Cooled:83D/C:04+

The 1/(fOSC)(C1) term in Equation 1 is the effective output resistance of an ideal switched capacitor circuit (Figures 2a, 2b). The losses in the circuit due to factor (4) above are also shown in Equation 2. The output voltage ripple is given by Equation 3.

VI-J71-CY

Vendor:VICORPackage Cooled:MODULE

Figure 1: Figure 2: Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26:

VI-J71-CY/F4

Vendor:VICORPackage Cooled:MODULED/C:05+

• wideband coverage, DC to 18 GHz • extra rugged construction with strain relief for longer life • stainless steel SMA and Type N connectors for long mating-cycle life • useful over temperature range, -55C to 105C • triple shield cable for excellent shielding effectiveness • flexible for easy connection & bend radius • superior stability of insertion ...

VI-J71-CZ

Vendor:VICORPackage Cooled:MODULE

The Fairchild Switch FST34170 is a 17-bit to 34-bit high- speed CMOS TTL-compatible multiplexer/demultiplexer bus switch. The low on resistance of the switch allows inputs to be connected to outputs without adding propaga- tion delay or generating additional ground bounce noise.

VI-J71-EW

Vendor:VICORPackage Cooled:N/AD/C:04+

Industry Standard MICROWIRE Bus Single Supply Voltage: C 4.5 to 5.5V for M93Cx6 C 2.5 to 5.5V for M93Cx6-W C 1.8 to 5.5V for M93Cx6-R Dual Organization: by Word (x16) or Byte (x8) Programming Instructions that work on: Byte, Word or Entire Memory Self-timed Programming Cycle with Auto- Erase Ready/Busy Signal During Programming Speed: C 1MHz Clock Rate, 10ms Write Time (Current product, ide...

VI-J71-EX

Vendor:VICORPackage Cooled:83D/C:04+

1A, 1B, 1C = SPST N.O., SPST N.C., SPDT 2A, 2B, 2C = DPST N.O., DPST N.C., DPDT 3A, 3B, 3C = 3PST N.O., 3PST N.C., 3PDT 4A, 4B, 4C = 4PST N.O., 4PST N.C., 4PDT 1 Pole: 20A @ 277VAC & 28VDC 2 Pole: 12A @ 250VAC & 28VDC; 10A @ 277VAC; ½ hp @ 125VAC 3 Pole: 12A @ 250VAC & 28VDC; 10A @ 277VAC; ½ hp @ 125VAC 4 Pole: 12A @ 250VAC & 28VDC; 10A @ 277VAC; ½ hp @ 125VAC < 50 mi...

VI-J71-EX

Vendor:VICORPackage Cooled:N/AD/C:270V/12V/75W

1A, 1B, 1C = SPST N.O., SPST N.C., SPDT 2A, 2B, 2C = DPST N.O., DPST N.C., DPDT 3A, 3B, 3C = 3PST N.O., 3PST N.C., 3PDT 4A, 4B, 4C = 4PST N.O., 4PST N.C., 4PDT 1 Pole: 20A @ 277VAC & 28VDC 2 Pole: 12A @ 250VAC & 28VDC; 10A @ 277VAC; ½ hp @ 125VAC 3 Pole: 12A @ 250VAC & 28VDC; 10A @ 277VAC; ½ hp @ 125VAC 4 Pole: 12A @ 250VAC & 28VDC; 10A @ 277VAC; ½ hp @ 125VAC < 50 mi...

VI-J71-EY

Vendor:VICORPackage Cooled:MODULED/C:04+

The UCC384-x family of negative linear-series pass regulators is tailored for low-dropout applications where low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output differential applications, the UCC384-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom. Dropout voltage decreases linearly with output current, so that dropout at 50 mA is...

VI-J71-EY

Vendor:VICORPackage Cooled:N/AD/C:03+

The UCC384-x family of negative linear-series pass regulators is tailored for low-dropout applications where low-quiescent power is important. Fabricated with a BCDMOS technology ideally suited for low input-to-output differential applications, the UCC384-x passes 0.5 A while requiring only 0.2 V of input-voltage headroom. Dropout voltage decreases linearly with output current, so that dropout at 50 mA is...

VI-J71-EZ

Vendor:VICORPackage Cooled:MODULED/C:04+

CONSTRUCTION Start with the two resistors followed by the small monobloc capacitor. Next comes the IC socket with the electrolytic and polyester capacitors last. Be careful to get the electrolytic capacitors in the right way around. The positive lead is marked on the overlay. The negative lead is marked on the body of the capacitor.

VI-J71-IX

Vendor:VICORPackage Cooled:N/AD/C:04+

NOTES: (1) LSB means least significant bit. With VREF equal to +2.5V, one LSB is 610µV. (2) Ensured by design, but not tested. Exceeding 50mA source current may result in device degradation. (3) Difference between TEMP0 and TEMP1 measurement. No calibration necessary. (4) Temperature drift is C2.1mV/C. (5) ADS7846 operates down to 2.2V.

VI-J71-IX

Vendor:VICORPackage Cooled:N/AD/C:04+

NOTES: (1) LSB means least significant bit. With VREF equal to +2.5V, one LSB is 610µV. (2) Ensured by design, but not tested. Exceeding 50mA source current may result in device degradation. (3) Difference between TEMP0 and TEMP1 measurement. No calibration necessary. (4) Temperature drift is C2.1mV/C. (5) ADS7846 operates down to 2.2V.

VI-J71-IY

Vendor:VICORPackage Cooled:MODULE

Table as shown lists type numbers, which indicate a tolerance of +/-20% with guaranteed limits on only VZ, IR, and VF. Devices with guaranteed limits on all six parameters are indicated by suffix A for +/-10%, B for +/-5%, C for +/-2%, and D for +/-1% tolerance. The electrical characteristics are measured after allowing the device to stabilize for 20 seconds. Temperature coefficient (vz). Test conditions for ...

VI-J71-IY

Vendor:VICORPackage Cooled:MODULED/C:03+

Table as shown lists type numbers, which indicate a tolerance of +/-20% with guaranteed limits on only VZ, IR, and VF. Devices with guaranteed limits on all six parameters are indicated by suffix A for +/-10%, B for +/-5%, C for +/-2%, and D for +/-1% tolerance. The electrical characteristics are measured after allowing the device to stabilize for 20 seconds. Temperature coefficient (vz). Test conditions for ...

VI-J71-IZ

Vendor:VICORPackage Cooled:MODULE

The QS532805 clock buffer/driver circuits can be used for clock buffering schemes where low skew is a key parameter. This device offers two banks of 5 non-inverting outputs. The QS532805 incorporates 25Ω series termination resistors. This clock buffer product is designed for use in high performance workstations, embedded and personal computing systems using 3V to 3.6V supply voltages. Several can be us...

VI-J71-MY

Vendor:Vicor

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and the functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute max- imum rating conditions for extended periods may affect device reliability.

VI-J71-MZ

Vendor:Vicor

Four instructions require a three-byte sequence to complete. These instructions transfer data between the host and the VI-J71-MZ; either between the host and one of the Data Registers or directly between the host and the WCR. These instructions are: Read WCR, read the current wiper position of the selected pot; Write WCR, change current wiper position of the selected pot; Read Data Register, read the...

VI-J72-01

Vendor:VICOR

The total current drawn from the power supply can be less than the laser threshold current due to the unique push-only modulation method. The average current is less than the peak oscillator current, and can be less than half of the oscillator current. The power control current supplied from the main board is reduced to less than 2mA.

VI-J72-CX

Vendor:VICORPackage Cooled:83

The software driver for PS700 was developed for a PIC® microcontroller and can be installed on the PowerInfo 2 board when using a PS705X module board or a PS7070 evaluation board. This software driver is distributed on a PIC16F876 when a license agreement has been executed.

VI-J72-EX

Vendor:VICORPackage Cooled:82D/C:04+

ACEX 1K devices contain an interface that permits microprocessors to configure ACEX 1K devices serially or in parallel, and synchronously or asynchronously. The interface also enables microprocessors to treat an ACEX 1K device as memory and configure it by writing to a virtual memory location, simplifying device reconfiguration.

VI-J72-EY

Vendor:VICOR

Options :- 10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. High Isolation Voltage (5.3kVRMS ,7.5kVPK ) Zero Voltage Crossing 200V Peak Blocking Voltage All electrical parameters 100% tested Custom electrical selections available

VI-J72-EY

Vendor:VICOR

Options :- 10mm lead spread - add G after part no. Surface mount - add SM after part no. Tape&reel - add SMT&R after part no. High Isolation Voltage (5.3kVRMS ,7.5kVPK ) Zero Voltage Crossing 200V Peak Blocking Voltage All electrical parameters 100% tested Custom electrical selections available

VI-J72-EZ

Vendor:VICORPackage Cooled:N/AD/C:03+

• AN765, Using Microchips Micropower LDOs, DS00765, Microchip Technology Inc., 2002 • AN766, Pin-Compatible CMOS Upgrades to BiPolar LDOs, DS00766, Microchip Technology Inc., 2002 • AN792, A Method to Determine How Much Power a SOT23 Can Dissipate in an Application, DS00792, Microchip Technology Inc., 2001

VI-J72-IW

Vendor:VICORPackage Cooled:N/AD/C:04+

The relay control output is protected via the integrated 23-V Z-diode in the case of short interference peaks. It is switched to a conductive condition for a battery voltage of greater than approximate 40 V in the case of a load-dump. The output transistor is dimensioned so that it can withstand the current produced.

VI-J72-IX

Vendor:VICORPackage Cooled:82

Parameters identified with boldface type apply over the full operating temperature range. Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Line and Load regulation are guaranteed up to the maximum...

VI-J72-IX

Vendor:VICORPackage Cooled:MODULE

Parameters identified with boldface type apply over the full operating temperature range. Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Note 2: Line and Load regulation are guaranteed up to the maximum...

VI-J72-IZ

Vendor:VICORPackage Cooled:N/AD/C:04+

Soldering (10 seconds)+260˚C ESD Susceptibility Human Body Model (Note 3)2 kV Machine Model (Note 3)200V See AN-450 Surface Mounting Methods and Their Effect on Product Reliability for other methods of soldering surface mount devices.

VI-J73-CW

Vendor:VICORPackage Cooled:82D/C:270V/24V/100W

Not 100% tested. CB = total capacitance of one bus line in pF. As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region (minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions. The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved noise spike suppression. This eli...

VI-J73-CX

Vendor:VICORPackage Cooled:N/AD/C:04+

The K4S280432F / K4S280832F / K4S281632F is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits / 4 x 4,194,304 words by 8 bits / 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNGs high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of op...

VI-J73-CX

Vendor:VICORPackage Cooled:82D/C:04+

The K4S280432F / K4S280832F / K4S281632F is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 8,388,608 words by 4 bits / 4 x 4,194,304 words by 8 bits / 4 x 2,097,152 words by 16 bits, fabricated with SAMSUNGs high perfor- mance CMOS technology. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of op...

VI-J73-CY

Vendor:VICORPackage Cooled:MODULE

Features • Fully compliant to IrDA 1.3 specifications: C 2.4 kb/s to 1.152 Mb/s C Excellent nose-to-nose operation C Typical link distance > 1.5 m • Guaranteed temperature performance, C20 to 70 C C Critical parameters are guaranteed over specified temperatures and supply voltages • Low power consumption C Low shutdown current (10 nA typical) C Complete shutdown for ...

VI-J73-CY/F2

Vendor:VICORD/C:N/A

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Rati...

VI-J73-CY/F2

Vendor:VICORPackage Cooled:ModuleD/C:N/A

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Rati...

VI-J73-CZ(F2)425

Vendor:100D/C:IGBT

Erase Suspend enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved. The device is fully erased when shipped from the factory.

VI-J73-CZ-F2

Vendor:100D/C:IGBT

Note 5: Total latency for the channel link chipset is a function of clock period and gate delays through the transmitter (TCCD) and receiver (RCCD). The total latency for the 217/287 transmitter and 218/288 receiver is: (T + TCCD) + (2*T + RCCD), where T = Clock period. See also DS90CR217 datasheet.

VI-J73-EX

Vendor:VICORPackage Cooled:82D/C:04+

Write all (WRAL) The Write All (WRAL) instruction programs all registers with the data pattern specified in the instruction. While the WRAL instruction is being loaded, the address field becomes a sequence of DON'T-CARE bits. (Shown in Figure 7) As with the WRITE instruction, if CS is brought HIGH after a minimum wait of 250ns (tcs), the DO pin indicates the READY/BUSY status of the chip. (shown in figure 7)

VI-J73-EX

Vendor:VICORPackage Cooled:82D/C:04+

Write all (WRAL) The Write All (WRAL) instruction programs all registers with the data pattern specified in the instruction. While the WRAL instruction is being loaded, the address field becomes a sequence of DON'T-CARE bits. (Shown in Figure 7) As with the WRITE instruction, if CS is brought HIGH after a minimum wait of 250ns (tcs), the DO pin indicates the READY/BUSY status of the chip. (shown in figure 7)

VI-J73-EY

Vendor:VICORPackage Cooled:N/AD/C:04+

The Hyundai HYM72V64736AT8 Series are Dual In-line Memory Modules suitable for easy interchange and addition of 512Mbytes memory. The Hyundai HYM72V64736AT8 Series are fully synchronous operation referenced to the positive edge of the clock . All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.

VI-J73-EZ

Vendor:VICORPackage Cooled:N/AD/C:04+

HPCTM family core features 16-bit data bus ALU and registers 64 kbytes of external memory addressing FAST 20 0 MHz system clock Four 16-bit timer counters with WATCHDOGTM logic MICROWIRE PLUSTM serial I O interface CMOS low power with two power save modes

VI-J73-EZ

Vendor:VICORPackage Cooled:N/AD/C:04+

HPCTM family core features 16-bit data bus ALU and registers 64 kbytes of external memory addressing FAST 20 0 MHz system clock Four 16-bit timer counters with WATCHDOGTM logic MICROWIRE PLUSTM serial I O interface CMOS low power with two power save modes

VI-J73-IX

Vendor:VICORPackage Cooled:N/AD/C:270V/24V/75W

The LH28F800BG-L/BGH-L flash memories with SmartVoltage technology are high-density, low-cost, nonvolatile, read/write storage solution for a wide range of applications. The LH28F800BG-L/BGH-L can operate at VCC = 2.7 V and VPP = 2.7 V. Their low voltage operation capability realizes longer battery life and suits for cellular phone application. Their boot, parameter and main-blocked architecture, f...

VI-J73-IY

Vendor:VICORPackage Cooled:81D/C:04+

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Measured with minimum pad spacing on an FR4 board, using 10 mm−b...

VI-J73-IZ

Vendor:VICORPackage Cooled:81

1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device.

VI-J73-IZ

Vendor:VICORPackage Cooled:81

1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device.

VI-J74-CW

Vendor:VICORPackage Cooled:N/AD/C:04+

The Customer should ensure that it has the most up to date version of the document by contacting its local Motorola office. This document supersedes any earlier documentation relating to the products referred to herein. The information contained in this document is current at the date of publication. It may subsequently be updated, revised or withdrawn.

VI-J74-CW

Vendor:VICORPackage Cooled:N/AD/C:04+

The Customer should ensure that it has the most up to date version of the document by contacting its local Motorola office. This document supersedes any earlier documentation relating to the products referred to herein. The information contained in this document is current at the date of publication. It may subsequently be updated, revised or withdrawn.

VI-J74-CY

Vendor:VICORPackage Cooled:MODULED/C:03+

Hynix HYMD216M726(L)6-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous oper- ations referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising and falling edges of it. The data paths are internally pipe...

VI-J74-EX

Vendor:VICORPackage Cooled:81D/C:04+

For example, to reset bit 3 of port C, bit 7 is reset to indicate that the write is in the port C bit set/reset format. Bits 6 through 4 are dont care. Bits 3 through 1 are 011 to address bit 3, and bit 0 is 0 to indicate a reset operation. The complete data word is 0XXX0110. The X indicates dont care.

VI-J74-EY

Vendor:VICORPackage Cooled:N/AD/C:04+

International Rectifier does not recommend the use of this product in aerospace, avionics, military or life support applications. Users of this International Rectifier product in such applications assume all risks of such use and indemnify International Rectifier against all damages resulting from such use.

VI-J74-EY

Vendor:VICORPackage Cooled:MODULED/C:04+

International Rectifier does not recommend the use of this product in aerospace, avionics, military or life support applications. Users of this International Rectifier product in such applications assume all risks of such use and indemnify International Rectifier against all damages resulting from such use.

VI-J74-EZ

Vendor:VICORPackage Cooled:N/AD/C:04+

Edition 09.97 Published by Siemens AG, Bereich Halbleiter, Marketing- Kommunikation, Balanstraße 73, 81541 Mnchen © Siemens AG 1995. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information d...

VI-J74-IW

Vendor:VICORPackage Cooled:81D/C:04+

The VI-J74-IWE is a 1 driver, 1 receiver device and the VI-J74-IW is a 2 driver, 2 receiver device that, coupled with the 5x5 QFN package, provide the industrys smallest, lowest power serial port suitable for PDAs, and hand-held applications. The 5x5 QFN requires 40% less board area than a 20 lead TSSOP, and is nearly 20% thinner.

VI-J74-IX

Vendor:VICORPackage Cooled:MODULE

Source code: ◊ VHDL Source Code or/and ◊ VERILOG Source Code or/and ◊ Encrypted, or plain text EDIF netlist VHDL & VERILOG test bench environment ◊ Active-HDL automatic simulation macros ◊ ModelSim automatic simulation macros ◊ Tests with reference responses Technical documentation ◊ Installation notes ◊ HDL core specification ◊ Datasheet Synthes...

VI-J74-IY

Vendor:VICORPackage Cooled:81D/C:270V/48V/50W

The control inputs UC and DC are active low inputs which interpret input pulse widths as the means of controlling wiper movement. Internally, these inputs are pulled up to VCC via a 100 kΩ resistance. A transition from a high-to-low on these inputs is considered the beginning of pulse input activity.

VI-J74-IY

Vendor:VICORPackage Cooled:N/AD/C:04+

The control inputs UC and DC are active low inputs which interpret input pulse widths as the means of controlling wiper movement. Internally, these inputs are pulled up to VCC via a 100 kΩ resistance. A transition from a high-to-low on these inputs is considered the beginning of pulse input activity.

VI-J74-IZ

Vendor:VICORPackage Cooled:80D/C:270V/48V/25W

The PCI I/O region is also a 4 Gbyte space. However, most systems and I/O devices only use a 64 Kbyte subset of this space for I/O mapped addresses. The ADSP-BF535 Blackfin processor implements a 64K byte window into this space along with a base address register which can be used to position it anywhere in the PCI I/O address space, while the window remains at the same address in the processor's address...

VI-J7B-CY

Vendor:VICORPackage Cooled:80

The power switch is an N-channel MOSFET with a maximum on-state resistance of 135 mΩ (VI(IN) = 5 V). Configured as a high-side switch, the power switch prevents current flow from OUT to IN and IN to OUT when disabled. The power switch can supply a minimum of 250 mA per switch.

VI-J7B-EW

Package Cooled:80

The VI-J7B-EW consists of two 12-bit registers, control logic and a 12-bit multiplying D/A converter. The input register (register A) is a 12-bit serial-in parallel-out shift register. Serial data at the SR1 pin is clocked into Register A on the leading or trailing edge (user selected) of the strobe input, with the MSB loaded first. Register B is a 12-bit parallel-in parallel-out register that follows ...

VI-J7B-EX

The VI-J7B-EXA has an additional amplifier, A2, which provides a temperature proportional output, VTC. If this is summed into the inverting input of the error amplifier, a negative temperature coefficient results at the output. This is useful when powering liquid crystal displays over wide temperature ranges.

VI-J7B-EZ

Open-Drain Output to Power Transistor Driving Fan. Connect to the gate of a MOSFET or base of a bipolar transistor. PWM_ requires a pullup resistor. The pullup resistor can be connected to a supply voltage as high as 13.5V, regardless of the MAX6640s supply voltage.

VI-J7D-CW

Package Cooled:80

Specifications Outline Dimensions Pin Connections and Short Descriptions Pin Descriptions Pin Configurations Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions (TA = 0 to 70 C) General Recommended Operating Conditions Analog Input and Output Recommendations Recommendations for Analog Sound IF Input Signal Crystal Recommendations Characteristics Gen...

VI-J7D-CY

Package Cooled:80

DESCRIPTION This power MOSFET is designed using the compa- nys consolidated strip layout-based MESH OVER- LAY™ process. This technology matches and improves the performances compared with standard parts from various sources. Isolated TO-220 option simplifies assembly and cuts risk of accidental short circuit in crowded monitor PCBs.

VI-J7F-CY

Vendor:VICORPackage Cooled:270V/72V/50WD/C:270V/72V/50W

HARDWARE PROTECTION: Hardware features protect against inadvertent writes to the AT28C010-12DK in the following ways: (a) VCC sense C if VCC is below 3.8V (typical) the write function is inhibited; (b) VCC power-on delay C once VCC has reached 3.8V the device will automatically time out 5 ms (typical) before allowing a write: (c) write inhibit - holding any one of OE low, CE high or WE high inhibits write...