Index "V"Package Cooled:PLCC
Hardware Reset, active Low. Provides a hardware method of resetting the HY 29DS16x to the read array state. When the device is reset, it immediately terminates any operation in progress. The data bus is tri-stated and all read/write commands are ignored while the input is asserted. While RESET# is asserted, the device will be in the Standby mode.
Vendor:VTCD/C:92
Vendor:VTCD/C:92
Vendor:VTCPackage Cooled:PLCCD/C:08+
• For upper-leg IGBTS : Drive circuit, High voltage isolated high-speed level shifting, Control circuit under-voltage (UV) protection. Note : Bootstrap supply scheme can be applied. • For lower-leg IGBTS : Drive circuit, Control circuit under-voltage protection (UV), Short-circuit protection (SC). • Fault signaling : Corresponding to a SC fault (Low-side IGBT) or a UV fault (Low-side IGB...
Vendor:VTCPackage Cooled:QFP1010-52D/C:94+
A key feature of the P89LV51RB2/RC2/RD2 is its X2 mode option. The design engineer can choose to run the application with the conventional 80C51 clock rate (12 clocks per machine cycle) or select the X2 mode (6 clocks per machine cycle) to achieve twice the throughput at the same clock frequency. Another way to benefit from this feature is to keep the same performance by reducing the clock frequency ...
Package Cooled:92D/C:950
The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
Vendor:OMROND/C:07/08+
Vendor:OMRONPackage Cooled:原装D/C:08+
Vendor:VTCPackage Cooled:PLCCD/C:93
Current Regulation / Light Intensity Control TheISENSEvoltageisfedintoan ErrorAmp/Comparator. The user defined Control Voltage applied at the CTRL input is scaled by a gain factor of 1/13 and compared to the ISENSE voltage. If the scaled control voltage is greater than the ISENSE voltage, the 1.0MHz oscillator signal driving the N-Channel MOSFET will be enabled. Once the ISENSE voltage reaches the scaled...
Vendor:VTCD/C:07/08+
Vendor:VTCD/C:08+
Package Cooled:2005D/C:800
Up to 16Kbytes program memory Data RAM: up to 512 bytes with 64 bytes stack Run, Wait and Halt CPU modes 12 or 24 MHz oscillator RAM retention mode USB (Universal Serial Bus) Interface with DMA for low speed applications compliant with USB 1.5 Mbs specification (version 1.1) and USB HID specifications (version 1.0) Integrated 3.3V voltage regulator and transceivers Suspend and Resume operation...
Package Cooled:06+D/C:800
Up to 16Kbytes program memory Data RAM: up to 512 bytes with 64 bytes stack Run, Wait and Halt CPU modes 12 or 24 MHz oscillator RAM retention mode USB (Universal Serial Bus) Interface with DMA for low speed applications compliant with USB 1.5 Mbs specification (version 1.1) and USB HID specifications (version 1.0) Integrated 3.3V voltage regulator and transceivers Suspend and Resume operation...
Vendor:VTCPackage Cooled:QFP1010-44D/C:98+
Notes: 1. Failure criterion ; IR 100 nA at VR = 60 V 2. Please do not use the soldering iron due to avoid high stress to the EFP package. 3. The material of lead is exposed for cutting plane. Therefor, soldering nature of lead tip part is considered as unquestioned. Please kindly consider soldering nature.
Vendor:.D/C:03+
Package Cooled:QFP52
Vendor:VTCPackage Cooled:QFP1010-52D/C:98+
These high-speed optocouplers are designed for use in analog or digital interface applications that require high-voltage isolation between the input and output. Applications include line receivers that require high common-mode transient immunity, and analog or logic circuits that require input-to-output electrical isolation.
Vendor:VTCPackage Cooled:2005D/C:98+
These high-speed optocouplers are designed for use in analog or digital interface applications that require high-voltage isolation between the input and output. Applications include line receivers that require high common-mode transient immunity, and analog or logic circuits that require input-to-output electrical isolation.
Vendor:VTCD/C:07+
Vendor:OMROND/C:06+
Package Cooled:QFPD/C:00
The ROHM Diode Manufacturing Department has developed PIN diodes optimized for car audio and car antenna AGC (Auto Gain Control) applications. A press announcement will be held in conjunction with this release. Therefore, it is recommended that promotion of the products be conducted at this time.
Vendor:OMRONPackage Cooled:原装D/C:08+
Vendor:VTCD/C:2000
Footnotes: 1) Standard frequency stability (20,25,50ppm & others available) 2) VOL, VOH, referenced to ground (VCC) with VEE = -5.2V 3) Jitter performance is frequency dependent. Please contact factory for full characterization.
EXTERNAL ACCESS ENABLE: This pin forces the processor to execute out of external ROM. It should be kept high to access internal ROM. The ROM address and data will not be present on the bus if EA pin is high and the program counter is within 32 KB area. Otherwise they will be present on the bus.
Package Cooled:TSSOP
Thermal Design The V10665VSA2 incorporates an internal thermal shutdown that protects the device when the junction temperature exceeds the maximum allowable junction temperature. Although this device can operate with junction tempera- tures in the range of 1508C, it is recommended that the selected heat sink be chosen such that during maxi- mum continuous load operation the junction tempera- ture is kept be...
Vendor:OMROND/C:07/08+
Vendor:ALPHAPackage Cooled:SOT163
The RF5189 is a linear, medium-power, high-efficiency amplifier IC designed specifically for battery-powered WLAN applications such as PC cards, mini PCI, and compact flash applications. The device is manufactured on an advanced Gallium Arsenide Heterojunction Bipolar Transistor (HBT) process, and has been designed for use as the final RF amplifier in 2.5GHz WLAN and other spread-spectrum transmitter...
Notes: 1. All dimensions are in millimeters (inches). 2. Tolerance is 0.25mm (.010") unless otherwise noted. 3. Protruded resin under flange is 1.5mm (.059") max. 4. Lead spacing is measured where the leads emerge from the package. 5. Specifications are subject to change without notice.
DESCRIPTION The V10E130, V10E130, V10E130 each consist5.1 of an infrared emitting diode and a NPN silicon photo transistor mounted side by side onpoint of converging axes in a polycarbonate housing. Theoptimum responsepackage is designed to optimise the mechanical resolution, coupling efficiency, ambient light rejection, cost and reliability.The phototransistor responds to radiation from the emitt...
Power Down pin that, when high, puts the converter into the Power Down mode where it consumes just 1 mW of power. It takes less than 1 ms to recover from this mode after the PD pin is brought low. If both the STBY and PD pins are high simultaneously, the PD pin dominates.
Vendor:harPackage Cooled:harD/C:dc98
In conjunction with the V103 transmitter, the V104 can transmit 10 bits per color (R, G, B) along with 5 bits of control and timing data (HSYNC, VSYNC, DE, CNTL1, CNTL2) over a low EMI, low bus width connection including connectors and standard LVDS cabling.
In the Burst Read Waveform as shown on page 31, the valid address is latched at point A. For the specified clock latency of three, data D13 is valid within 13 ns of clock edge B. The low-to-high transition of the clock at point C results in D14 being read. The transition of the clock at point D results in a burst read of D15. The clock transition at point E does not cause new data to appear on the output ...
In the Burst Read Waveform as shown on page 31, the valid address is latched at point A. For the specified clock latency of three, data D13 is valid within 13 ns of clock edge B. The low-to-high transition of the clock at point C results in D14 being read. The transition of the clock at point D results in a burst read of D15. The clock transition at point E does not cause new data to appear on the output ...
Vendor:LTPackage Cooled:SSOP
Built-in low-voltage detection circuit. Prevents incorrect operations and writing errors in the EEPROM during drops in power voltage. An external LVD must be used to assert reset at power supply voltage below 4.5 V if Neuron Chip is operated at 20 MHz.
Vendor:ADD/C:96年97年
The ADC works in fully differential mode from the analog input to the digital outputs. It provides an on-chip 100Ω differential termination for the clock input. The analog input is 500 mVpp on a 100Ω differential input impedance. 50Ω reverse terminations are required for the analog input. They should be placed as close as possible to the EBGA package input pins (2 mm maximum). The output ...
Vendor:ADPackage Cooled:96年97年D/C:96年97年
The ADC works in fully differential mode from the analog input to the digital outputs. It provides an on-chip 100Ω differential termination for the clock input. The analog input is 500 mVpp on a 100Ω differential input impedance. 50Ω reverse terminations are required for the analog input. They should be placed as close as possible to the EBGA package input pins (2 mm maximum). The output ...
Vendor:INFINEONPackage Cooled:SOP28D/C:06+
Output Noise Voltage C The rms ac voltage at the output, with constant load and no input ripple, measured over a specified frequency range. Leakage Current C Current drawn through a bipolar transistor collectorCbase junction, under a specified collector voltage, when the transistor is off. Upper Threshold Voltage C Voltage applied to the comparator input terminal, below the reference voltage which i...
Vendor:INFINEONPackage Cooled:SMD28D/C:04+
Error amplifier inverting Soft start and SCP setting capacitor connection pin Power supply pin Output current setting and control pin Totem-pole type output pin Ground pin Capacitor and resistor connection pin setting the oscillation frequency Error amplifier output pin
Vendor:INFINEONPackage Cooled:SMD28D/C:04+
This technique of supplying a small voltage effectively in series with the input is also used for adjusting non-inverting amplifiers. As is shown in Figure 3, divider R1, R2 reduces the voltage at the arm of the pot to 7.5 mW for offset adjustment. Since R2 appears in series with R4, R2 should be considered when calculating the gain. If R4 is greater than 10 kΩ the error due to R2 is less than 1%.
Vendor:OMROND/C:07/08+
Vendor:OMROND/C:08+
These circuits perform a single function: they assert a reset signal whenever the VCC supply voltage declines below a preset threshold, keeping it asserted for at least 100ms after VCC has risen above the reset threshold. The only difference between the devices is their output. The MAX6326/MAX6346 (push-pull) and MAX6328/ MAX6348 (open-drain) have an active-low reset output. The MAX6327/MAX6347 have an acti...
Vendor:NAISPackage Cooled:DIP6D/C:DIP6
Notes: 1. No permanent damage with only one parameter set at maximum limit and all other parameters at typical conditions 2. All parameters met at Tc = +25 C, Vdd = 4.0V 3. Pin = -20 dBm, Vdd = 4.0 V, Frequency 3.5 - 6.5 GHz 4. Data de-embedded from fixture loss
Vendor:NAISPackage Cooled:150
Notes: 1. No permanent damage with only one parameter set at maximum limit and all other parameters at typical conditions 2. All parameters met at Tc = +25 C, Vdd = 4.0V 3. Pin = -20 dBm, Vdd = 4.0 V, Frequency 3.5 - 6.5 GHz 4. Data de-embedded from fixture loss
Vendor:OMRONPackage Cooled:原装D/C:07/08+
Vendor:SILICONIX
resistor of 50 Ω, but also other termination schemes are possible. The cell V11388 can be set in power down mode. It requires the V11388ERXBIAS cell for biasing. V11388ERXBIAS can drive up to 3 V11388 cells. An external voltage reference must be used.
Vendor:SILICONZXPackage Cooled:TO-92D/C:9018+
Specifically designed for Automotive applications, this HEXFET® Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional fea- tures of this design are a 175C junction operat- ing temperature, fast switching speed and im- proved repetitive avalanche rating . These fea- tures combine to make this design an extremely efficient and r...
Package Cooled:DIP-16D/C:96
If required, surface contamination may be removed with electronic grade solvents such as freon (T.F. or T.M.C.), acetone, deionized water, and methanol used singu- larly or in combinations. Typical cleaning times per solvent are one to three minutes. DI water and methanol should be used (in that order) in the final cleansing. Final
Vendor:ERICSSONPackage Cooled:BGA0707D/C:01+
Vendor:LittelfuseD/C:08+
Operating voltage range Current consumption during standby Built-in 2.2V stable power supply Can operate on single power supply Control pins D0 and D1 have TTL interface Built-in thermal shutdown Built-in counter-electromotive clamp diode
Vendor:LittelfuseD/C:08+
Operating voltage range Current consumption during standby Built-in 2.2V stable power supply Can operate on single power supply Control pins D0 and D1 have TTL interface Built-in thermal shutdown Built-in counter-electromotive clamp diode
Vendor:LITTELFUSE
The instruction set consists of 51 instructions with three formats and seven address modes. Each instruction can operate on word and byte data. Table 1 shows examples of the three types of instruction formats; the address modes are listed in Table 2.
Vendor:LITTELFUSE
The instruction set consists of 51 instructions with three formats and seven address modes. Each instruction can operate on word and byte data. Table 1 shows examples of the three types of instruction formats; the address modes are listed in Table 2.
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com
• High current sink/source 25 mA/25 mA • Three external interrupts • Enhanced Capture/Compare/PWM (ECCP) module: - One, two or four PWM outputs - Selectable polarity - Programmable dead time - Auto-Shutdown and Auto-Restart - Capture is 16-bit, max resolution 6.25 ns (TCY/16) - Compare is 16-bit, max resolution 100 ns (TCY) • Compatible 10-bit, up to 13-channel Analog-to...
Vendor:SIXPackage Cooled:2005D/C:95+/96+
Video Input These pins accept the YCrCb data in CCIR656 (4:2:2) digital video format. The sequence of the Y, Cb, Cr data is defined by the YCSWAP and CbSWAP pins. For more details, please refer to the timing diagram shown in Figure 5 on page 7. Y has a nominal range of 16C235. Cb & Cr have a nominal range of 16C240, with 128 equal to zero.
Vendor:SIXPackage Cooled:2005D/C:95+/96+
Video Input These pins accept the YCrCb data in CCIR656 (4:2:2) digital video format. The sequence of the Y, Cb, Cr data is defined by the YCSWAP and CbSWAP pins. For more details, please refer to the timing diagram shown in Figure 5 on page 7. Y has a nominal range of 16C235. Cb & Cr have a nominal range of 16C240, with 128 equal to zero.
Vendor:TID/C:05+
Notes: 1. See test circuit and waveforms. 2. This parameter is guaranteed but not tested on Propagation Delays. 3. The bus switch contributes no propagational delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 0.25ns for 50pF load. Since this time constant is much smaller than the rise/fall times of typical...
Vendor:[H]Package Cooled:N/AD/C:9+
Vendor:HPackage Cooled:PLCCD/C:2
Programmable options include the length of pipeline ( CAS latency of 2 or 3), the number of consecutive read or write cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count sequence(sequential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or can be interrupted and replaced by a new burst read or writ...
Vendor:BGAPackage Cooled:496D/C:06+
ESD (electrostatic discharge) threatens an electronic system every time someone replaces a cable or touches an I/O port. The discharges accompanying these routine events can render an I/O port useless by destroying one or more interface ICs connected to the port. These failures can be expensive in terms of both warranty repairs and perceived quality.
Vendor:BGAPackage Cooled:496D/C:06+
ESD (electrostatic discharge) threatens an electronic system every time someone replaces a cable or touches an I/O port. The discharges accompanying these routine events can render an I/O port useless by destroying one or more interface ICs connected to the port. These failures can be expensive in terms of both warranty repairs and perceived quality.
Vendor:HPackage Cooled:PLCC-28D/C:32
Configurations or a Single Bidirectional Configuration Working Peak Reverse Voltage Range − 3 V to 26 V Standard Zener Breakdown Voltage Range − 5.6 V to 33 V Peak Power − 24 or 40 Watts @ 1.0 ms (Unidirectional), per Figure 5 Waveform ESD Rating of Class N (exceeding 16 kV) per the Human Body Model Maximum Clamping Voltage @ Peak Pulse Current Low Leakage < 5.0 mA Flammability R...
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may de...
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may de...
Vendor:SIEMENSPackage Cooled:QFPD/C:1998
Another multiplexer system using the OTAs clocked by a CMOS flip-flop is shown in Figure 6. The high output voltage capability of the CMOS flip-flop permits the circuit to be driven directly without the need for PNP level-shifting transistors.
Vendor:LITTELFUSE
Vendor:sgsPackage Cooled:sgsD/C:dc94
TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to ...
Vendor:harPackage Cooled:harD/C:dc98
The V12ZA05 is a gain programmable, high performance instru- mentation amplifier that delivers the industrys highest CMRR over frequency. The CMRR of instrumentation amplifiers on the market today falls off at 200 Hz. In contrast, the V12ZA05 maintains a minimum CMRR of 80 dB to 10 kHz for all grades at G = 1. High CMRR over frequency allows the V12ZA05 to reject wideband interference and line harmonic...
An on-chip oscillator eliminates the need for an external crystal oscillator circuit. This can reduce overall design cost and conserve circuit board space. The CS4271 au- tomatically uses the on-chip oscillator in the absence of an applied master clock, making this feature easy to use.
HIGH SPEED: tPD = 21ns (TYP.) at VCC = 4.5V LOW POWER DISSIPATION: ICC = 4µA(MAX.) at TA=25C COMPATIBLE WITH TTL OUTPUTS : VIH = 2V (MIN.) VIL = 0.8V (MAX) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 6mA (MIN) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 573
Vendor:harPackage Cooled:harD/C:dc96
The reconstruction filters provide a 5th order Butterworth response with group delay equalization. This provides a maxi- mally flat response in terms of delay and amplitude. Each of the three outputs is capable of driving 2Vpp into a 75Ω load.
Figure 1 shows a typical battery pack application of the bq2014 using the LED display capability as a charge- state indicator. The bq2014 is configured to display ca- pacity in a relative display mode. The relative display mode uses the last measured discharge capacity of the battery as the battery full reference. The LED seg- ments output a percentage of the available charge based on NAC and LMD. A push-but...
Figure 1 shows a typical battery pack application of the bq2014 using the LED display capability as a charge- state indicator. The bq2014 is configured to display ca- pacity in a relative display mode. The relative display mode uses the last measured discharge capacity of the battery as the battery full reference. The LED seg- ments output a percentage of the available charge based on NAC and LMD. A push-but...
Requiring 15V and +5V supplies, the ADS-930 typically dissipates 3.5 Watts. The unit is offered with a bipolar input range of 5V or a unipolar input range of 0 to C10V. Models are available for use in either commercial (0 to +70C) or military (C55 to +125C) operating temperature ranges. Typical applications include radar, sonar, medical/graphic imaging, and FFT spectrum analysis.
Vendor:STPackage Cooled:QFP
− Provides low speed control functions − 30 Mhz execution speed at 4 cycles per instruction average − 12K Bytes of internal SRAM for general purpose scratchpad − 768 Bytes of internal SRAM for general purpose scratchpad or program execution while re-flashing external ROM
Vendor:STPackage Cooled:QFP
− Provides low speed control functions − 30 Mhz execution speed at 4 cycles per instruction average − 12K Bytes of internal SRAM for general purpose scratchpad − 768 Bytes of internal SRAM for general purpose scratchpad or program execution while re-flashing external ROM
Vendor:STPackage Cooled:QFP
The ATR4258 is a highly integrated AM/FM front-end circuit manufactured using Atmels advanced BICMOS technology. It represents a complete, automatically adjust- able AM/FM front end, containing a double-conversion system for FM and an up/down-conversion receiver for AM with IF1 = 10.7 MHz and IF2 = 450 kHz. The front end is suitable for digital or analog AF-signal processing. Together with the PLL U4256BM...
Package Cooled:DIP4D/C:05+
The V1-3G1 can regulate three series LEDs connected at low output currents, down to approximately 4mA from a 4.2V supply, without pulse skipping, using the same external components as specified for 15mA operation. As current is further reduced, the device will begin skipping
Vendor:SIMEPackage Cooled:9920+D/C:9920+
Notes: * Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by the lower of the voltages of the two (A or B) terminals. This is the increase in supply current for control input. All typical values are at VCC = 3.3V, TA = 25C.
Vendor:TOSHIBAPackage Cooled:07+D/C:2230
The clock generator consists essentially of a PLL which generates the internal and exported system clocks from input clock LL3 or LL1.5 and synchronizes them with the horizontal blanking signal. The MSC can be set to one of the two input frequencies via input LLSEL. For the possible use of the Featurebox as a channel scanner, the PLL incorporates a crystal-controlled reference clock to ensure an undist...
Vendor:TOSHIBAPackage Cooled:DIPD/C:2230
The clock generator consists essentially of a PLL which generates the internal and exported system clocks from input clock LL3 or LL1.5 and synchronizes them with the horizontal blanking signal. The MSC can be set to one of the two input frequencies via input LLSEL. For the possible use of the Featurebox as a channel scanner, the PLL incorporates a crystal-controlled reference clock to ensure an undist...
Vendor:[H]Package Cooled:01+D/C:O1
Note 1: Output or reference voltage temperature coefficients defined as the worst case voltage change divided by the total temperature range. Note 2: Unless otherwise specified all limits guaranteed for TJ = 25C, VIN = 6V, IL = 100µA and CL = 1µF. Additional conditions for the 8-pin versions are feedback tied to 5V tap and output tied to output sense (VOUT = 5V) and VSHUTDOWN 0.8V. Note...
Vendor:LITTEIFUSEPackage Cooled:04+D/C:50000
The digital input pins - able to receive signals up to 400KHz - are connected to level shifters that pro- vide the control signals to their relevant drivers; in particular the V14MLA0402NH embeds one driver for the PFC pre-regulator stage, two drivers for the ballast
Package Cooled:littelfuseD/C:225313
The ZL10037 is a fully integrated direct conversion tuner for digital satellite receiver systems. It provides excellent immunity to composite undesired channels. The device also contains a RF Bypass for connecting to a second receiver module.