VI-BNL-IU

Vendor:VICORPackage Cooled:25D/C:120

NOTE: ESD data available upon request. 1. 10H circuits are designed to meet the DC specifications shown in the table after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse airflow greater than 500 lfpm is maintained. Outputs are terminated through a 50 W resistor to −2.0 V except where otherwise specified on the individua...

VI-BNM-CV

This single mode transceiver is a Class 1 laser product. It complies with IEC-60825 and FDA 21 CFR 1040.10 and 1040.11. The transceiver must be operated within the specified temperature and voltage limits. The optical ports of the module shall be terminated with an optical connector or with a dust plug.

VI-BNM-CW

Package Cooled:25

1. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 2. VBR measured at pulse test current IT at an ambient temperature of 25C. 3. Surge current waveform per Figure 2 and derate per Figure 3 of the General Data − 600 Watt at the beginning of this group. * The G...

VI-BNM-EV/F2

Vendor:VICORPackage Cooled:MODULE

Allows Safe Board Insertion and Removal from a Live Backplane Controls Supply Voltages from 2.5V to 16.5V Programmable Soft-Start with Inrush Current Limiting, No External Gate Capacitor Required Faster Turn-Off Time Because No External Gate Capacitor is Required Dual Level Overcurrent Fault Protection Programmable Response Time for Overcurrent Protection (MS) Programmable Overvoltage Protection (MS) Aut...

VI-BNM-IV

Package Cooled:25

The thermal path between the plastic package and the die is not as good as the path through the leads, so the MAX6672/MAX6673, like all temperature sensors in plastic packages, are less sensitive to the temperature of the surrounding air than they are to the temperature of their leads. They can be successfully used to sense ambient temperature if the circuit board is designed to track the ambient temperature...

VI-BNM-IW

Available in the Texas Instruments NanoStar and NanoFree Packages Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode Operation Sub 1-V Operable Max tpd of 2.5 ns at 1.8 V Low Power Consumption, 10-µA Max ICC 8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Pro...

VI-BNN-CW

DIGITAL INPUT CURRENT Input High Current, IIH Input Low Current, IIL Input Capacitance, CIN EEPROM RELIABILITY Endurance9 Data Retention10 SERIAL BUS TIMING Clock Frequency, fSCLK Glitch Immunity, tSW Bus Free Time, tBUF Start Setup Time, tSU; STA Start Hold Time, tHD; STA SCL Low Time, tLOW SCL High Time, tHIGH SCL, SDA Rise Time, tr SCL, SDA Fall Time, tf Data Setup Time, tSU; DAT ...

VI-BNN-IV

DESCRIPTION The M54/74HC51 is a high speed CMOS DUAL 2 WIDE-2 INPUT AND/OR INVERT GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. It contains a 2- WIDE 2-INPUT AND-OR-INVERT GATE and a 2- WIDE 3-INPUT AND-OR-INVERT GATE.

VI-BNP-CU

WP#/ACC input accelerates programming time (when high voltage is applied) for greater throughput during system production. Protects first or last sector regardless of sector protection settings Hardware reset input (RESET#) resets device Ready/Busy# output (RY/BY#) detects program or erase cycle completion

VI-BNR-CW

Vendor:VICORPackage Cooled:25D/C:48V/7.5V/100W

The HC4017 is a high speed silicon gate CMOS 5-stage Johnson counter with 10 decoded outputs. Each of the decoded outputs is normally low and sequentially goes high on the low to high transition clock period of the 10 clock period cycle. The CARRY (TC) output transitions low to high after OUTPUT 10 goes from high to low, and can be used in conjunction with the CLOCK ENABLE (CE) to cascade several stag...

VI-BNR-IU

In order to use the Candy boards, users must have Windows 98 Second Edition (SE) Operating System or a later version installed on their computer. The user will just need to plug in the device and Windows should be able to detect it and install the appropriate drivers. If you are using Windows 98 SE you will need the Windows installation disk to install appropriate drivers.

VI-BNT-CV

FEATURES D 11-Bit Resolution D 65-MSPS Maximum Sample Rate D 2-Vpp Differential Input Range D 3.3-V Single Supply Operation D 1.8-V to 3.3-V Output Supply D 400-mW Total Power Dissipation D Twos Complement Output Format D On-Chip S/H and Duty Cycle Adjust Circuit D Internal or External Reference D 63.3-dBFS SNR and 72.9-dBc SFDR at

VI-BNV-CU

Package Cooled:25

The 165 and LS165A are 8-bit serial shift registers that shift the data in the direction of QA toward QH when clocked. Parallel-in access to each stage is made available by eight individual, direct data inputs that are enabled by a low level at the shift/load (SH/LD) input. These registers also feature gated clock (CLK) inputs and complementary outputs from the eighth bit. All inputsarediode-clamped...

VI-BNV-CV

Vendor:VICORPackage Cooled:25D/C:48V/5.8V/150W

These TTL circuits feature dual 1-line-to-4-line demultiplex- ers with individual strobes and common binary-address in- puts in a single 16-pin package When both sections are enabled by the strobes the common address inputs se- quentially select and route associated input data to the ap- propriate output of each section The individual strobes per- mit activating or inhibiting each of the 4-bit sections...

VI-BNV-EU

Package Cooled:25

The Intersil HSP45240 is a high speed Address Sequencer which provides specialized addressing for functions like FFTs, 1-D and 2-D filtering, matrix operations, and image manipulation. The sequencer supports block oriented addressing of large data sets up to 24-bits at clock speeds up to 50MHz.

VI-BNV-EV

Package Cooled:25

ASYNCHRONOUS OPERATION For asynchronous operation, separate transmit and receive clocks may be applied. MCLKX and MCLKR must be 2.048 MHz for the TP3057, or 1.536 MHz, 1.544 MHz for the TP3054, and need not be synchronous. For best transmis- sion performance, however, MCLKR should be synchronous with MCLKX, which is easily achieved by applying only static logic levels to the MCLKR/PDN pin. This will a...

VI-BNV-IV

Atmel's 28C010 has additional features to ensure high quality in manufacturing. The device utilizes internal error correction for extended endurance and improved data retention characteristics. An optional software data protection mechanism is available to guard against inadvertent writes. The device also includes an extra 128 bytes of EEPROM for device identification or tracking.

VI-BNW-EV

Vendor:VICORD/C:48V/5.5V/150W

E3 or DS3 Selection (Input). In Hardware Control, when the E3DS3/OC3 pin is set high, logic low on E3/DS3 pin selects a 44.736 MHz clock on C34/C44 output and logic high selects 34.368 MHz clock. When E3DS3/OC3 pin is set low, logic low on E3/DS3 pin selects 11.184 MHz clock on C34/C44 output and logic high selects 8.592 MHz clock.

VI-BNW-IV

Package Cooled:24

All 240xA devices offer at least one event manager module which has been optimized for digital motor control and power conversion applications. Capabilities of this module include center- and/or edge-aligned PWM generation, programmable deadband to prevent shoot-through faults, and synchronized analog-to-digital conversion. Devices with dual event managers enable multiple motor and/or converter control wi...

VI-BNX-CU

In most applications the input coupling capacitors are 0.1µF. The Y and C inputs typically sink 1µA of current during active video, which normally tilts a horizontal line by 2mV at the Y out- put. During sync, the clamp restores this leakage current by sourcing an average of 20µA over the clamp interval. Any change in the coupling capacitor values will affect the amount of tilt per lin...

VI-BNX-EW

Vendor:VICORD/C:48V/5.2V/100W

• Low VCE (on) Non Punch Through IGBT Technology • Low Diode VF • 10µs Short Circuit Capability • Square RBSOA • HEXFRED Antiparallel Diode with Ultrasoft Diode Reverse Recovery Characteristics • Positive VCE (on) Temperature Coefficient • Ceramic DBC Substrate • Low Stray Inductance Design

VI-BNY-CU

Package Cooled:24

Note 5: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues. For more information on these topics, please refer to the Power Dissipation section of this datasheet.

VI-BNY-EU

Package Cooled:24

After FIR filtering, data can be routed directly to the two external 16-bit output ports. Alternatively, data can be routed through two additional half-band interpolation stages, where up to four channels can be combined (interleaved), interpolated, and processed by an automatic gain control (AGC) circuit with 96 dB range. The outputs from the two AGC stages are also routed directly to the two external...

VI-BNY-IU

Vendor:VICORPackage Cooled:24D/C:48V/3.3V/132W

NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Transie...

VI-BNZ-CV

Vendor:VICORD/C:48V/2V/60W

The voltage-controlled oscillator (VCO) receives the filtered error signal from the Loop Filter and based on the voltage of the error signal generates a primary frequency. The VCO output is connected to the "Frequency Dividers and Clock Drivers" block that divides VCO frequency and buffer generated clocks.

VI-BNZ-EU

Bluetooth® V1.1 specification compliant SW compatible with STLC2410B-M28R400CT combination 2 layer class 4 PCB compatible Point-to-point, point-to-multi-point (up to 7 slaves) and scatternet capability Asynchronous Connection Less (ACL) link support giving data rates up to 721 kbps Synchronous Connection Oriented (SCO) link Standard BlueRF bus interface Clock support C System clock input: 1...

VIBRATM29-2

VI-BT0-CU

Vendor:VICORPackage Cooled:24D/C:04+

Features qInternational standard packages qLow RDS (on) HDMOSTM process qRugged polysilicon gate cell structure qUnclamped Inductive Switching (UIS) rated qLow package inductance - easy to drive and to protect qFast intrinsic Rectifier

VI-BT0-CV

Vendor:VICORPackage Cooled:MODULED/C:04+

Figure 1 shows a high-level block diagram of a 128 macro- cell device implementing the XPLA architecture. The XPLA architecture consists of logic blocks that are interconnected by a zero-power Interconnect Array (ZIA). The ZIA is a vir- tual crosspoint switch. Each logic block is essentially a 36V16 device with 36 inputs from the ZIA and 16 macro- cells. Each logic block also provides 32 ZIA feedback p...

VI-BT0-CW

Vendor:VICORPackage Cooled:N/AD/C:04+

EE cell S1 controls whether the macrocell will be combi- natorial or registered/latched. S0 controls the output po- larity (active-HIGH or active-LOW). S2 determines whether the storage element is a register or a latch. S3 allows the use of the macrocell as an input register/latch or as an output register/latch. It selects the direction of the data path through the register/latch. If connected to the ...

VI-BT0-EV

Vendor:VICORPackage Cooled:N/AD/C:04+

With only 1 square inches and less than 1 Watt per channel (in ADSL mode, 1.15W/line in ADSL+ mode), the Copperwing12 chipset is one of the most competitive solutions for CO ADSL applica- tion. The chip set supports also ADSL+ mode to deliver higher bit rate (24Mb/s) on short loops while with Reach Extended ADSL is able to guar- antee high reach performance.

VI-BT0-IV

Vendor:VICORPackage Cooled:N/AD/C:04+

1. All high speed inputs and outputs are differential to improve performance. 2. All single−ended inputs are CMOS and NECL/ECL compatible. 3. All VCC and VEE pins must be externally connected to external power supply voltage to guarantee proper device operation. The thermally exposed pad (EP) on package bottom (see case drawing) must be attached to a heat−sinking conduit. Exposed pad is bonded...

VI-BT1-CW

Vendor:VICORPackage Cooled:N/AD/C:04+

dresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been sta- ble for at least tAVQV-tGLQV. Standby Mode The M27C256B has a standby mode which reduc- es the supply current from 30mA to 100µA. The M27C256B is place...

VI-BT1-EV

Vendor:VICORPackage Cooled:24D/C:04+

systems with output voltages below 7V, a 10µH inductor is the best choice, even though the equation above might specify a smaller value. This is due to the inductor current overshoot that occurs when very small inductor values are used (see Current Limit Overshoot section).

VI-BT1-IU

Vendor:VICORPackage Cooled:24D/C:110V/12V/200W

The MAX7447 processes S-Video and CVBS video sig- nals. The video output buffers have a fixed gain of +6dB. Each channel has high-frequency boost circuitry that pro- vides picture sharpness with up to +1.2dB of gain boost without degradation in the stopband. The output video drivers can be disabled with an external pin. The MAX7447 is available in a 14-pin TSSOP package with an exposed pad, and is specified ...

VI-BT2-EW

Vendor:VICORPackage Cooled:N/AD/C:04+

SS (Pin 13) (soft start): SS will remain at Gnd as long as the IC is disabled or VCC is too low. SS will pull up to over 8V by an internal 14µA current source when both VCC be- comes valid and the IC is enabled. SS will act as the ref- erence input to the voltage amplifier if SS is below REF. With a large capacitor from SS to Gnd, the reference to the voltage regulating amplifier will rise slowly,...

VI-BT3-EV

Vendor:VICORPackage Cooled:N/A

EPIC™ (Enhanced-Performance Implanted CMOS) Submicron Process ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 250 mA Per JESD 17 Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25C Inputs Accept Voltages to 5.5 V P...

VI-BT3-IU

Vendor:VICORPackage Cooled:N/AD/C:04+

The JEDEC low-K (1s) board design used to derive this data was a 3-inch x 3-inch, two layer board with 2 ounce copper traces on top of the board. The JEDEC high-K (2s2p) board design used to derive this data was a 3-inch x 3-inch, multilayer board with 1 ounce internal power and ground planes and 2 ounce copper traces on top and bottom of the board.

VI-BT4-CV

Vendor:VICORPackage Cooled:24D/C:04+

Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive.

VI-BT4-CW

Vendor:VICORPackage Cooled:N/AD/C:04+

NOTES 1Absolute maximum ratings apply to both DICE and packaged parts, unless otherwise noted. 2JA is specified for worst case mounting conditions, i.e., JA is specified for device in socket for cerdip, P-DIP, and LCC packages; JA is specified for device soldered to printed circuit board for SO package.

VI-BT4-EU

Vendor:VICORPackage Cooled:N/AD/C:04+

This is the inverting power amplifier output, which is used to provide a feedback signal to the PI pin to set the gain of the pushCpull power amplifier outputs. This pin is capable of driving a 300 Ω load to PO+. The PO+ and POC outputs are differential (pushCpull) and capable of driving a 300 Ω load to 1.772 V peak, which is 3.544 V peakCtoCpeak. The bias volt- age and signal reference o...

VI-BT4-IU

Vendor:VICORPackage Cooled:N/AD/C:04+

The ICS clock generator is a slave/receiver, I2C component. It can read back the data stored in the latches for verification. Read-Back will support Intel PIIX4 "Block-Read" protocol. The data transfer rate supported by this clock generator is 100K bits/sec or less (standard mode) The input is operating at 3.3V logic levels. The data byte format is 8 bit bytes. To simplify the clock generator...

VI-BTB-EW

Package Cooled:23

Note 6: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH).

VI-BTD-EU

Vendor:VICORPackage Cooled:23D/C:110V/85V/200W

Error Amplifier The error amplifier consists of a high slew rate (15V/µs) op-amp with a typical 1MHz bandwidth and low output im- pedance. Depending on the VS supply voltage, the com- mon mode input range and the voltage output swing is within 2V of the VS supply.

VI-BTD-EW

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS v (Vin or Vout) v VDD. Unused inputs must always be tied to an appropri...

VI-BTD-IW

Package Cooled:23

Commands are issued to the CSM using standard microprocessor write timings. The CSM acts as an interface between the external microprocessor and the internal WSM. The available commands are listed in Table 1 and the description of these commands are shown in Table 2. When a program or erase command is issued to the CSM, the WSM controls the internal sequences and the CSM only responds to status reads. Af...

VI-BTF-EW

Power DissipationInternally limited Input Voltage15V Operating Junction Temperature Range Control Section-40C to 125C Power Transistor-40C to 150C Storage temperature- 65C to +150C Soldering information Lead Temperature (10 sec)300C

VI-BTF-IW

Package Cooled:23

The main counter, Nominal Available Charge (NAC), represents the available battery capacity at any given time. Battery charging increments the NAC register, while battery discharging and self-discharge decrement the NAC register and increment the DCR (Discharge Count Register).

VI-BTH-CU

The MPX10 series device is a silicon piezoresistive pressure sensor providing a very accurate and linear voltage output directly proportional to the applied pressure. This standard, low cost, uncompensated sensor permits manufacturers to design and add their own external temperature compensating and signal conditioning networks. Compensation techniques are simplified because of the predictability of Moto...

VI-BTH-CV

Package Cooled:23

Notes: (i) See Safe Operating Area curves or contact the factory for the appropriate derating. (ii) During solder reflow of SMD package version, do not elevate the module, case, pins, or internal component temperatures above a peak of 215C. For further guidance refer to the application note, Reflow Soldering Requirements for Plug-in Power Surface Mount Products, (SLTA051).

VI-BTH-IU

Package Cooled:23

The four documents listed in Table 1 are required for a complete description and proper design with the DSP56F801. Documentation is available from local Motorola distributors, Motorola semiconductor sales offices, Motorola Literature Distribution Centers, or online at www.motorola.com/semiconductors/dsp.

VI-BTJ-CU

SM5212E begin a 4-word transmission cycle upon receipt of a transmission enable (TE active low). This cycle will repeat itself as long as the transmission enable (TE is held low). Once the transmission enable returns high the encoder output completes its final cycle and then stops as shown below.

VI-BTJ-EU

The HCT245 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses are effectively isolated.

VI-BTJ-IW

Package Cooled:22

Two mechanisms are provided to assist in controlling the amount of mapped space and the replacement characteristics of various memory regions. First, the page size can be configured, on a per-entry basis, to map a page size of 4KB to 16MB (in multiples of 4). A CP0 register is loaded with the page size of a mapping, and that size is entered into the TLB when a new entry is written. Thus, operating syste...

VI-BTK-CU

MAX 7000A devices provide programmable speed/power optimization. Speed-critical portions of a design can run at high speed/full power, while the remaining portions run at reduced speed/low power. This speed/power optimization feature enables the designer to configure one or more macrocells to operate at 50% or lower power while adding only a nominal timing delay. MAX 7000A devices also provide an option ...

VI-BTK-CV

Vendor:VICORD/C:110V/40V/150W

The UC3854A/B products are pin compatible enhanced versions of the UC3854. Like the UC3854, these products provide all of the functions necessary for active power factor corrected preregulators. The controller achieves near unity power factor by shaping the AC input line current waveform to correspond to the AC input line voltage. To do this the UC3854A/B uses average current mode control. Average ...

VI-BTK-EU

FEATURES High Ripple Rejection75dB typ. (f=1kHz Vo=3V version) Output Noise VoltageVno=30µVrms typ. (Cp=0.01µF) Output capacitor with 1.0uF ceramic capacitor(Vo2.7V: Version) Output CurrentIo(max.)=150mA High Precision OutputVo 1.0% Low Dropout Voltage0.10V typ. (Io=60mA) Input Voltage Range+2.3 ∼ +14V(Vo2.0V version) ON/OFF Control(Active High) Internal Short Circuit Current...

VI-BTL-CW

Vendor:VICORPackage Cooled:22D/C:04+

Notes: 1. See XPLA3 family data sheet (DS012) for recommended operating conditions. 2. See Table 1, Figure1 for typical values. 3. This parameter measured with a 16-bit, loadable up/down counter loaded into every logic block, with all outputs disabled and unloaded. Inputs are tied to VCC or ground. This parameter guaranteed by design and characterization, not testing. 4. Typical values not tested.

VI-BTL-EV

Vendor:VICOR

designed to protect the gate from any remaining ESD energy and over-voltages above the gates inherent safe operating range. The series resistor used to limit the current through the second stage diode during over voltage conditions has a maximum value which limits the input current to v 10 mA @ 14 V and the maximum toff to 12 ms. The Si6924EDQ has been optimized as a battery or load switch in Lithium I...

VI-BTL-EW

Vendor:VICORPackage Cooled:N/AD/C:04+

Members of the Texas Instruments Widebus™ Family Flow-Through Architecture Optimizes PCB Layout Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise EPIC™ (Enhanced-Performance Implanted CMOS) 1-µm Process 500-mA Typical Latch-Up Immunity at 125C Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Packages Using 25-mil Center-to-Center Pin Spacin...

VI-BTM-IU

Package Cooled:22

The direct connects allow immediate connections to neigh- boring CLBs, once again without using any of the general interconnect. These two layers of local routing resource improve the granularity of the architecture, effectively mak- ing the XC5200 family a sea of logic cells. Each Versa-Block has four 3-state buffers that share a common enable line and directly drive horizontal and vertical Lon- glin...

VI-BTM-IV

Note 13: Differential gain and differential phase measured for four series LM6361 op amps configured as unity-gain followers, in series with an LM6321 buffer. Error added by LM6321 is negligible. Test performed using Tektronix Type 520 NTSC test system.

VI-BTN-CW

Edition 01.96 This edition was realized using the software system FrameMaker®. Published by Siemens AG, Bereich Halbleiter, Marketing- Kommunikation, Balanstraße 73, 81541 Mnchen © Siemens AG 1996. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits im...

VI-BTN-EU

Parameter SENSOR INPUT Measurement Range Nonlinearity Package Alignment Error Alignment Error Cross Axis Sensitivity SENSITIVITY (RATIOMETRIC)2 Sensitivity at XOUT, YOUT Sensitivity Change due to Temperature3 ZERO g BIAS LEVEL (RATIOMETRIC) 0 g Voltage at XOUT, YOUT 0 g Offset vs. Temperature NOISE PERFORMANCE Noise Density FREQUENCY RESPONSE4 CX, CY Range5 RFILT Tolerance Sensor Res...

VI-BTP-CX

Package Cooled:22

Description ACSL-6xx0 are truly isolated, multi-channel and bi-directional, high-speed optocouplers. Integra- tion of multiple optocouplers in monolithic form is achieved through patented process tech- nology. These devices provide full duplex and bi-directional iso- lated data transfer and communi- cation capability in compact surface mount packages. Avail- able in 15 Mbd speed option and wide supply ...

VI-BTP-EU

Package Cooled:22

Guaranteed by design and characterization. Image rejection typically falls to 30dBc at the frequency extremes. Refer to the Typical Operating Characteristics for a plot showing Receiver Gain vs. LNAGAIN Voltage, Input IP3 vs. LNAGAIN Voltage, and Noise Figure vs. LNAGAIN Voltage. Two tones at PRXIN = -45dBm each, f1 = 915.0MHz and f2 = 915.2MHz. Time delay from VRXON = 0.45V to VRXON = 2.4V transition to the ...

VI-BTR-CW

D/C:110V/7.5V/100W

The MCP300X family offers existing Microchip customers added flexibility when incorporating analog inputs into their designs. The industry standard SPI interface allows 10-bit ADC capability to be added to any PICmicro® microcontroller. In addition, new customers will find the performance and price of the MCP300X family very attractive.

VI-BTR-EW

Package Cooled:22

The HC4015 consists of two identical, independent, 4-stage serial-input/parallel-output registers. Each register has independent Clock (CP) and Reset (MR) inputs as well as a single serial Data input. Q outputs are available from each of the four stages on both registers. All register stages are D- type, master-slave flip-flops. The logic level present at the Data input is transferred into ...

VI-BTR-IW

Vendor:VICORD/C:110V/7.5V/100W

The MSP430 CPU has a 16-bit RISC architecture that is highly transparent to the application. All operations, other than program-flow instructions, are performed as register operations in conjunc- tion with seven addressing modes for source operand and four addressing modes for destina- tion operand.

VI-BTT-CW

The vector address area is used mostly during reset operations and interrupts. These 16 bytes can also be used as general-purpose ROM. The REF instruction references 2 1-byte and 2-byte instructions stored in locations 0020HC007FH. The REF instruction can also reference three-byte instructions such as JP or CALL. In order for REF to be able to reference these instructions, however, JP or CALL must be sho...

VI-BTT-CY

Single-Chip Parallel Multiple Instruction / Multiple Data (MIMD) DSP More Than Two Billion RISC-Equivalent Operations per Second Master Processor (MP) C 32-Bit Reduced Instruction Set Computing (RISC) Processor C IEEE-754 Floating-Point Capability C 4K-Byte Instruction Cache C 4K-Byte Data Cache Four Parallel Processors (PP) C 32-Bit Advanced DSPs C 64-Bit Opcode Provides Many Parallel Operations per...

VI-BTT-EU

Package Cooled:22

Operating voltage: 2.4V~5.0V Directly drives an external transistor Low standby current (1mA typ. for VDD=3V) Minimal external components 508 words table ROM for key functions Programmable silence length and end-pulse width (minimal end-pulse width is 330ms at a 6kHz sampling rate) 8.4-second voice capacity (based on a 6kHz sampling rate) 12 keys Controllable volume FLAG1 options - End-pulse outp...

VI-BTT-IU

Package Cooled:22

This device contains circuitry to protect the inputs against damage due to high static voltages or electric field; however, precautions should be taken to avoid application of any volt- age higher than the maximum rated voltages to this circuit. For proper operation, Vin and Vout should be constrained to the range:

VI-BTW-EU

Vendor:VICORD/C:110V/5.5V/200W

The software Block Erase mode is initiated by issuing the specific six-word loading sequence, as in the Software Data Protect operation. After the loading cycle, the device enters into an internally timed Erase cycle. (See Table 3 for specific codes, Figure 5-2 for the timing waveform, and Figure 13 for a flowchart.) During the Erase operation, the only valid reads are Data# Polling and Toggle Bit from the se...

VI-BTW-EW

Control Register A password protected read or write array command at address FFFFh reads or writes the Control Register. Since the control register contains information relating to the password protection, it is necessary to use the Array passwords to access the control register.

VI-BTX-IW

(5) When designing your equipment, comply with the guaranteed values, in particular those of maxi- mum rating, the range of operating power supply voltage and heat radiation characteristics. Other- wise, we will not be liable for any defect which may arise later in your equipment. Even when the products are used within the guaranteed values, redundant design is recommended, so that such equipment may n...

VI-BTZ-EW

The semiflash architecture reduces power consumption and die size compared to flash converters. By implementing the conversion in a 2-step process, the number of comparators is significantly reduced. The latency of the data output valid is 2.5 clocks.

VI-BTZ-IW

Vendor:VICORPackage Cooled:21D/C:110V/2V/40W

(*) CPD is defined as the value of the ICs internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operting current can be obtained by the following equation. ICC(opr) = CPD •VCC •fIN + ICC

VI-BW0-01

Vendor:VICOR

replacement; Electrically Erasable (EE) technology allows reprogrammability 16 bidirectional user-programmable I/O logic macrocells for Combinatorial/Registered/ Latched operation Output Enable controlled by a pin or product terms Varied product term distribution for increased design flexibility Programmable clock selection with common pin clock/latch enable (LE) or individual product term clock/LE with ...

VI-BW0-01/F1

D/C:N/A

• Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation • Programmable code protection • In-Circuit Serial ProgrammingTM (ICSPTM) via two pins

VI-BW0-01/F1

D/C:N/A

• Power-on Reset (POR), Power-up Timer (PWRT) and Oscillator Start-up Timer (OST) • Watchdog Timer (WDT) with its own on-chip RC oscillator for reliable operation • Programmable code protection • In-Circuit Serial ProgrammingTM (ICSPTM) via two pins

VI-BW0-CU

Vendor:VICORPackage Cooled:N/AD/C:04+

• Low-power consumption (Standby) Mode •Sleep mode (CPU operation clock stopped) •Time-base timer mode (oscillation clock and subclock, time-base timer and watch timer only operational) •Watch mode (subclock and watch timer only operational) •Stop mode (oscillation clock and subclock stopped) •CPU intermittent operation mode

VI-BW0-EU

Vendor:VICORPackage Cooled:N/AD/C:04+

1. Set the heater block temperature to 260C +/- 10C. 2. Use pre-stressed (annealed) gold wire between 0.0005 to 0.001 inches in diameter. 3. Tip bonding pressure should be between 15 and 20 grams and should not exceed 20 grams. The footprint that the wedge leaves on the gold wire should be between 1.5 and 2.5 wire diameters across for a good bond.

VI-BW0-EV

Vendor:VICORPackage Cooled:MODULE

Note 1: Absolute Maximum Ratings are those beyond which the safety of the device cannot be guaranteed. They are not meant to imply that the device should be operated at these limits. The table of Electrical Characteristics provides conditions for actual device operation.

VI-BW0-EW

Vendor:VICORPackage Cooled:21D/C:500

The LTC ®1698 is a precision secondary-side forward converter controller that synchronously drives external N-channel MOSFETs. It is designed for use with the LT®3781 primary-side synchronous forward converter controller to create a completely isolated power supply. The LT3781 synchronizes the LTC1698 through a small pulse transformer and the LTC1698 drives a feedback optocoupler to close the feedbac...

VI-BW0-IV

Vendor:VICORPackage Cooled:MODULE

VI-BW1-CV

Vendor:VICORPackage Cooled:MODULE

The host system can detect whether a program or erase operation is complete by reading the DQ7 (Data# Polling) and DQ6 (toggle) status bits. After a program or erase cycle has been completed, the de- vice is ready to read array data or accept another command.

VI-BW1-CW

Vendor:VICORPackage Cooled:N/AD/C:04+

The 56800 core is based on a Harvard-style architecture consisting of three execution units operating in parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming model and optimized instruction set allow straightforward generation of efficient, compact code for both DSP and MCU applications. The instruction set is also highly efficient for C compilers to enable...

VI-BW1-EU

Vendor:VICORPackage Cooled:N/AD/C:04+

(14) Interrupts: 21-source, 10-vectored interrupts 1) Three priority (low, high and highest) multiple interrupts are supported. During interrupt handling, an equal or lower priority interrupt request is refused. 2) If interrupt requests to two or more vector addresses occur at once, the higher priority interrupt takes precedence. In the case of equal priority levels, the vector with the lowest address...

VI-BW1-EV

Vendor:VICORPackage Cooled:21D/C:04+

Unless otherwise specified, these specifications apply at an ambient operating temperature of TA = 25C. TermPwr = 4.75V. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient temperature.

VI-BW1-IV

Vendor:VICORPackage Cooled:21D/C:24V/12V/150W

FEATURES Tri-Mode Operation 3.3 V, 5 V Fixed or +1.3 V to +16 V Adjustable Low Power CMOS: 9 µA max Quiescent Current High Current 100 mA Output Low Dropout Voltage Upgrade for VI-BW1-IV/VI-BW1-IV6 Small 0.1 µF Output Capacitor (0805 Style) +2 V to +16.5 V Operating Range Low Battery Detector VI-BW1-IV No Overshoot on Power-Up Thermal Shutdown

VI-BW2-CV

Vendor:VICORPackage Cooled:21D/C:04+

The UC3823A and UC3823B and the UC3825A and UC3825B family of PWM controllers are improved versions of the standard UC3823 and UC3825 family. Performance enhancements have been made to several of the circuit blocks. Error amplifier gain bandwidth product is 12 MHz, while input offset voltage is 2 mV. Current limit threshold is assured to a tolerance of 5%. Oscillator discharge current is specified at...

VI-BW2-EV

Vendor:VICORPackage Cooled:N/AD/C:04+

Many electronic appliances use a transient voltage suppressor (TVS) for overvoltage protection as shown in Figure 2. The TVS is typically a metal-oxide varister (MOV) or Transzorb. The former is a non-linear resistor with a soft turn-on characteristic whereas the latter is a large junction zener diode with a very sharp turn-on characteristic. These devices have high pulse-power capability and pico-second ...

VI-BW3-CV

Vendor:VICORPackage Cooled:MODULE

After each 24-hour period has elapsed, the battery is connected to an internal 1MW test resistor for one second. During this one second, if battery voltage falls below the battery voltage trip point (2.6V), the battery warning output BW is asserted. Once asserted, BW remains active until the module is replaced. The battery is still retested after each VCC power-up, however, even if BW is active. If the batte...

VI-BW3-CV/F2

Vendor:VICORPackage Cooled:N/AD/C:04+

NOTE: Intersil Pb-free products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

VI-BW3-CW

Vendor:VICORPackage Cooled:MODULE

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is func- tional, but do not guarantee specific performance limits. Electrical Characteristics state DC and AC electrical specifications under particular test conditions which guar- antee specific performance limits. This assumes that the device is within the...

VI-BW3-EU

Vendor:VICORPackage Cooled:N/AD/C:04+

The device incorporates auto-calibration and built-in self-test (BIST) routines to simplify development, type approval and production test. All hardware and device firmware is fully compliant with the Bluetooth v2.0 + EDR Specification (all mandatory and optional features).

VI-BW3-EW

Vendor:VICORPackage Cooled:N/AD/C:24V/24V/100W

When enabled by WEN, the rising edge of WCLK writes data into the FIFO and offsets into the programmable registers for parallel programming, and when enabled by SEN, the rising edge of WCLK writes one bit of data into the programmable register for serial programming.

VI-BW3-IW

Vendor:VICORPackage Cooled:N/AD/C:04+

• Supports Cypresss Ultra37000™, Ultra37000V™, Delta39K™, and PSI™ families of products • STAPL (Chain Dependent and Chain Independent) programming language support • SVF programming language support • Standard JTAG programming interface • Multi-device programming • Easy to use Windows XP-™, Windows 2000-™, Windows ME-™, Win...

VI-BW4-CV

Vendor:VICORPackage Cooled:N/AD/C:04+

Note: Stresses greater than those listed under MAXIMUM RATINGS may cause perma- nent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for ex- tended periods may affect reliability.