Index "W"Package Cooled:TSOPD/C:TSOP
The Fairchild Switch FST16213 provides 24-bits of high- speed CMOS TTL-compatible bus switching or exchang- ing. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
Package Cooled:2D/C:TSOP
The Fairchild Switch FST16213 provides 24-bits of high- speed CMOS TTL-compatible bus switching or exchang- ing. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating additional ground bounce noise.
Vendor:CYPRESSPackage Cooled:650
The 2K EEPROM devices all require an 8-bit device ad- dress word following a start condition to enable the chip for a read or write operation. The device address word consist of a mandatory one, zero sequence for the first four most significant bits (refer to the diagram showing the Device Address). This is common to all the EEPROM device.
Vendor:CYPPackage Cooled:D/SD/C:07+
Once fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any duration relative to the output pulse. Output pulse length can be varied from 35 ns to the maximum by choosing appropriate timing components. With Rext = 2 kΩ and Cext = 0, an outp...
Vendor:CYPPackage Cooled:SOPD/C:07+
Once fired, the outputs are independent of further transitions of the A and B inputs and are a function of the timing components, or the output pulses can be terminated by the overriding clear. Input pulses can be of any duration relative to the output pulse. Output pulse length can be varied from 35 ns to the maximum by choosing appropriate timing components. With Rext = 2 kΩ and Cext = 0, an outp...
Vendor:CYPRESSPackage Cooled:SSOP-24D/C:01+
NOTES 1VIL is the Logic Control Input. 2Current tested at V IN = 0 V. This is the worst case condition. 3Guaranteed by RON test condition. 4Turn-ON time is measured from the time the logic input reaches the 50% point to the time the output reaches 50% of the final value. 5Turn-OFF time is measured from the time the logic input reaches the 50% point to the time the output reaches 50% of the initial value. 6...
Vendor:CYPRESSPackage Cooled:SSOP-24D/C:01+
The LTC®3704 is a wide input range, current mode, positive-to-negative DC/DC controller that drives an N-channel power MOSFET and requires very few external components. Intended for low to high power applications, it eliminates the need for a current sense resistor by utilizing the power MOSFETs on-resistance, thereby maxi- mizing efficiency.
Package Cooled:SSOPD/C:98+
A Read Data from Memory (READ) instruction loads the address of the first byte or word to be read in an internal address register. The data at this address is then clocked out serially. The ad- dress register is automatically incremented after the data is output and, if Chip Select Input (S) is held High, the M93Cx6 can output a sequential stream of data bytes or words. In this way, the memory can ...
Vendor:CYPackage Cooled:00+D/C:00+
Vendor:CYPRESSD/C:28
- Suspends erase operations to allow programming in same bank Data Polling and Toggle Bit - Provides a software method of detecting the status of program or erase cycles Unlock Bypass Program command - Reduces overall programming time when issuing multiple program command sequences
Vendor:WORKSPackage Cooled:1000D/C:01+
Note 2: Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, with- out exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of FACT circuits outside databook specifications.
Package Cooled:SSOP-24D/C:CYPRESS
• Full-Duplex Audio Processing for AMPS/ NAMPS Cellular Systems • On-Chip Speech and SAT Capabilities C TX/RX Filtering & Gain C SAT Channel Pre-/De-Emphasis C Deviation Limiter • Serial µProcessor Interface • Sidetone Output Available • Access to External Processes C Companding C Signaling C VSR Codec (Store/Play)
Vendor:ICWORKPackage Cooled:SSOP-24D/C:99+
• Full-Duplex Audio Processing for AMPS/ NAMPS Cellular Systems • On-Chip Speech and SAT Capabilities C TX/RX Filtering & Gain C SAT Channel Pre-/De-Emphasis C Deviation Limiter • Serial µProcessor Interface • Sidetone Output Available • Access to External Processes C Companding C Signaling C VSR Codec (Store/Play)
Vendor:WINPackage Cooled:4800
ANALOG I/O 8-Channel, 400kSPS High Accuracy, 12-Bit ADC On-Chip, 20 ppm/ o C Voltage Reference DMA Controller, High-Speed ADC-to-RAM capture Two 12-Bit Voltage Output DACs Dual Output PWM-SD DACs On-Chip Temperature Monitor Function 8051 Based Core 8051-Compatible Instruction Set (16.7 MHz Max) High performance Single Cycle Core* 32kHz Ext Crystal,On-Chip Programmable-PLL 12 Interrupt Sources...
Vendor:WINPackage Cooled:4800
ANALOG I/O 8-Channel, 400kSPS High Accuracy, 12-Bit ADC On-Chip, 20 ppm/ o C Voltage Reference DMA Controller, High-Speed ADC-to-RAM capture Two 12-Bit Voltage Output DACs Dual Output PWM-SD DACs On-Chip Temperature Monitor Function 8051 Based Core 8051-Compatible Instruction Set (16.7 MHz Max) High performance Single Cycle Core* 32kHz Ext Crystal,On-Chip Programmable-PLL 12 Interrupt Sources...
Vendor:50000
All clock and data inputs are compatible with the JEDEC standard for SSTL_18. The control inputs are LVCMOS. All outputs are 1.8-V CMOS drivers that have been optimized to drive the DDR-II DIMM load. ICSSSTUF32864A operates from a differential clock (CK and CK#). Data are registered at the crossing of CK going high, and CK# going low.
Vendor:CYPRESSPackage Cooled:03+D/C:1410
Set the wait states in each bank by writing to the bank requiring the most wait states first and proceeding to the bank requiring the least wait states last. The documentation (literature number SPNU213) has been updated to reflect this requirement.
Package Cooled:1434
The FCT374T devices are high-speed, low-power, octal D-type flip-flops, featuring separate D-type inputs for each flip-flop. These devices have 3-state outputs for bus-oriented applications. A buffered clock (CP) and output-enable (OE) inputs are common to all flip-flops. The eight flip-flops in the FCT374T store the state of their individual D inputs that meet the setup-time and hold-time requirements on...
Package Cooled:SOP
Vendor:CYPackage Cooled:896D/C:01/P4
Asynchronous memory support is typically used to boot from a parallel non-multiplexed NOR flash device that can be 8, 16, or 32 bits wide. Booting from larger flash devices than are natively supported by the dedicated EMIF address lines is accomplished by using general-purpose I/O pins for upper address lines.
Vendor:CYPPackage Cooled:TSOPD/C:2000
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
Vendor:.D/C:07+
Vendor:.D/C:07+
Vendor:.D/C:07+
Vendor:WINPackage Cooled:99D/C:DIP
8-A Rated Output Current Replaces PT6500 Series High Efficiency (91% for PT6511) Small Footprint (0.75 in², Suffix N) Output On/Off Standby Control Output Short-Circuit Protection Over-Temperature Protection Adjustable Output Voltage Soft Startup 16-pin Mount Option (Suffixes L & F)
Vendor:SKYWORKSPackage Cooled:04D/C:2000
Tachyon TS provides the highest levels of concurrency via numerous independent functional blocks providing parallel processing of data, control, and commands. In addition, these blocks process at hardware speeds versus firmware speeds, and automate the entire SCSI I/O in hardware. The result is minimized latency and I/O overhead, coupled with the highest levels of parallel- ism to provide m...
Vendor:SKYWORKSPackage Cooled:04D/C:2000
Tachyon TS provides the highest levels of concurrency via numerous independent functional blocks providing parallel processing of data, control, and commands. In addition, these blocks process at hardware speeds versus firmware speeds, and automate the entire SCSI I/O in hardware. The result is minimized latency and I/O overhead, coupled with the highest levels of parallel- ism to provide m...
Vendor:ICWPackage Cooled:1000D/C:05+
This simple measurement arrangement is suited to many applications. There are, however, limitations to this basic approach. Input current continues to flow through S2 during the reset period. This leaves a small voltage on C INT equal to the input current times R S2, the on-resistance of S2, approximately 1.5kΩ.
Vendor:availPackage Cooled:CYPD/C:0236+
When the result is rounded to fewer than 16 bits, the unneeded lowest positions of the output bus are tristated and become supplementary control bits, which enable the x/sin(x) filter, bypass/delay, double-latency, dual-channel,
An open drain FAULT pin will indicate that a fault has occurred. The fault detection circuitry covers different types of failures; including dead short in the sourcing supply, a short of any two ORing MOSFET terminals, or a blown fuse in the power distribution path.
Vendor:TIPackage Cooled:1000
Package Cooled:SOP
Package Cooled:SOP
Vendor:VLSI
The TPS3820/3/5/8 devices incorporate a manual reset input, MR. A low level at MR causes RESET to become active. The TPS3824/5 devices include a high-level output RESET. TPS3820/3/4/8 have a watchdog timer that is periodically triggered by a positive or negative transition at WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, ttout, RESET becomes active...
Vendor:CYPRESSPackage Cooled:TSSOP14
Use Opti-MEM® I Reduced Serum Medium (Catalog no. 31985-062) to dilute Lipofectamine™ 2000 prior to complexing with DNA. Other media without serum (e.g. D-MEM) may be used to dilute Lipofectamine™ 2000, but transfection efficiency may be compromised.
Vendor:ATGTPackage Cooled:SOPD/C:05+
The UPC2721 output amplifier is a single-end push-pull ampli- fier designed for operation into a 50 Ω load. The UPC2722 output amplifier is the collector of one side of a balanced amplifier pair and operates best into a high impedance load. The absence of capacitive coupling in the UPC2722 permits better performance at IF frequencies below 25 MHz.
While first-generation deep- memory scopes update the display slowly, Infiniiums MegaZoom memory management system instantaneously updates the display even with the deepest memory. And deep memory is on all the time so you always have the maximum available sample rate and dont undersample or miss fast events. Discover prob- lems you never found with your first-generation deep-memory scope.
Vendor:WORKSPackage Cooled:SSOP56D/C:00+
The AMC5902 contains a direct PWM control system for spindle and two slide channels drive thus that the total power consumption can be reduced. Besides, voltage supplies for spindle, slide, focus/tracking and loading can be set separately.
Vendor:IC WORKSPackage Cooled:1000
This chapter provides a brief description of the CODEC features relating to the CODEC configuration. The configuration of the CODEC is defined by programming registers through a serial interface. A detailed description of the registers defining details of the CODEC setup can be found in chapter 3 and 7. Digital voice and audio samples are passed through the Serial Audio Interface.
Vendor:IC WORKSPackage Cooled:SMDD/C:08+
The low-cost ADS-930 is a high-performance, 16-bit, 500kHz sampling A/D converter. This device accurately samples full- scale input signals up to Nyquist frequencies with no missing codes. The dynamic performance of the ADS-930 is optimized to achieve a THD of C89dB and an SNR of 83dB.
Vendor: IC WORKSPackage Cooled:IC WORKS
A decoupling capacitor of 0.01µF must be connected between VDD (pin 2 & 7) and GND (pin 4), as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit.
Vendor:N/APackage Cooled:SSOP/48D/C:07+
International Rectifiers RAD-HardTM HEXFET® MOSFET Technology provides high performance power MOSFETs for space applications. This technology has over a decade of proven performance and reliability in satellite applica- tions. These devices have been characterized for both Total Dose and Single Event Effects (SEE). The combina- tion of low RDS(on) and low gate charge reduces the power losses in s...
Vendor: IC WORKSPackage Cooled:SOP
The IRU1015 keeps a constant 1.25V between the out- put pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, add- ing to the IADJ current and into the R2 resistor producing a voltage equal to the (1.25/R1)3R2 + IADJ3R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the mini- mum load current re...
Vendor:168Package Cooled:N/A
During normal operation, power consumption may be minimized by disabling the clock of any internal module that is not in use. In order to further reduce power consumption, the main CPU clock can be divided to run at a slower speed. In order to minimize power consumption when the device is not in use, a sleep mode is available that halts the operation of all logic and shuts down the oscillators and PLLs. R...
Vendor:N/AD/C:TO-3 P P3
Short sample gate dwell times after the X edge can be used to limit the effect of moisture spreading from key to key by taking advantage of the RC filter-like nature of continuous films; the shorter the dwell time, the less time that the charge has to travel through the impedance of the film. This effect is completely independent of the frequency of burst repetition, intra-burst pulse spacing, or X dr...
Vendor:600Package Cooled:N/A
Short sample gate dwell times after the X edge can be used to limit the effect of moisture spreading from key to key by taking advantage of the RC filter-like nature of continuous films; the shorter the dwell time, the less time that the charge has to travel through the impedance of the film. This effect is completely independent of the frequency of burst repetition, intra-burst pulse spacing, or X dr...
Vendor:TIPackage Cooled:4000D/C:00+
The AD9236 is a monolithic, single 3 V supply, 12-bit, 80 MSPS analog-to-digital converter featuring a high performance sam- ple-and-hold amplifier (SHA) and voltage reference. The AD9236 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy at 80 MSPS and guarantee no missing codes over the full operat- ing temperature range.
Vendor:TIPackage Cooled:SSOP-56D/C:02+
This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs.
Vendor:CYPRESSPackage Cooled:SSOP/7.2D/C:02+
CAPACITOR SELECTION To minimize ripple voltage, output capacitors with a low series resistance (ESR) are recommended. Multi-layer ceramic capacitors with X5R or X7R dielectric make an effective choice because they feature small size, very low ESR, a temperature stable dielectric, and can be connected in parallel to increase capacitance. Typical capacitance values of 4.7 to 30µF have proven effe...
Vendor:CYPRESSPackage Cooled:SSOP/7.2D/C:02+
CAPACITOR SELECTION To minimize ripple voltage, output capacitors with a low series resistance (ESR) are recommended. Multi-layer ceramic capacitors with X5R or X7R dielectric make an effective choice because they feature small size, very low ESR, a temperature stable dielectric, and can be connected in parallel to increase capacitance. Typical capacitance values of 4.7 to 30µF have proven effe...
Vendor:CYPackage Cooled:SOPD/C:01+
(1) Cx, Rx, Dx are external components. (2) Dx is a clamping diode. The external capacitor is charged to Vcc in the stand-by-state, i.e. no trigger. When the supply voltage is turned off Cx is di scharged mainly trough an internal parasitic diode(see figures). If Cx is sufficiently large and Vcc decreases rapidly, there will be some possibility of damaging the I.C. with a surge current or latch-up. If th...
Vendor:IC WORKSPackage Cooled:1053D/C:01+
Vendor:CYPRESSPackage Cooled:SOPD/C:01+
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Maximum package power dissipation limits must be observed.
Package Cooled:SOP
instant visual indication if there are any issues with the wiring plant supporting operation at the desired speed. This includes physical wiring defects or channel conditions, such as excessive cable length, return loss, crosstalk, echo, and noise. Broadcoms remote cable management and diagnostics software can be used with the device to provide remote management of the cable and a first level of diagno...
2. This spec must be met in order to ensure that a correct power on reset occurs. It is quite easily achieved using most common types of supplies, but may be violated if one uses a slowly varying supply voltage, as may be obtained through direct connection to solar cells, or some charge pump circuits.
2. This spec must be met in order to ensure that a correct power on reset occurs. It is quite easily achieved using most common types of supplies, but may be violated if one uses a slowly varying supply voltage, as may be obtained through direct connection to solar cells, or some charge pump circuits.
Vendor:SSOP48Package Cooled:24000D/C:99+
The QS32X2245 provides a set of 16 high-speed CMOS TTL-compatible bus switches in a flow-through pinout. The QS32X2245 includes internal 25Ω resistors to reduce reflection noise in high speed applications. The Output Enable (OEn) signals turn the switches on similar to the OEn signal of the 74'245. QuickSwitch devices provide an order of magnitude faster speed than conventional logic devices. The ...
Vendor:SSOP48Package Cooled:24000D/C:99+
The QS32X2245 provides a set of 16 high-speed CMOS TTL-compatible bus switches in a flow-through pinout. The QS32X2245 includes internal 25Ω resistors to reduce reflection noise in high speed applications. The Output Enable (OEn) signals turn the switches on similar to the OEn signal of the 74'245. QuickSwitch devices provide an order of magnitude faster speed than conventional logic devices. The ...
Package Cooled:07+D/C:2008+
(0) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan.
Vendor:CYPackage Cooled:07+D/C:SOP/16
(0) After power on, the first integration scan is not guaranteed correct. This scan is needed for initializing digital levels on chip. After a SI and 133 proper CLK signals, the system is fully initialized and all further scans are valid. The next SI will provide a valid scan.
Vendor:CYPRESSD/C:0130+
The ALVC245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus ori- ented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state.
Vendor:CYPRESSD/C:0130+
The ALVC245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus ori- ented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state.
Vendor:WPackage Cooled:SSOPD/C:N/A
Low input and output leakage 1µ A (max.) CMOS power levels True TTL input and output compatibility VOH = 3.3V (typ.) VOL = 0.3V (typ.) Meets or exceeds JEDEC standard 18 specifications A and C speed grades High drive outputs (-15mA IOH, 64mA IOL) Power off disable outputs permit live insertion Available in SOIC, SSOP, and QSOP packages
Vendor:CYPRESSPackage Cooled:SSOPD/C:0220+
MM1231, and BA7602 VCC Operating Range From 4.5 V to 9 V Wide Frequency Range (0 dB at 40 MHz, VCC = 5 V) Crosstalk (−75 dB at 4.43 MHz) BiCMOS Technology Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Performance Tested Per JESD 22 − 2000-V Human-Body Model (A114-B, Class II) − 1000-V Charged-Device Model (C101) Applications − Digital TV, LCD TV, PDP TV, and CRT TV ͨ...
Vendor:N/APackage Cooled:SSOPD/C:08+09+
The DS1804 NV trimmer potentiometer is a nonvolatile digital potentiometer that has 100 positions. The device provides an ideal method for low-cost trimming applications using a CPU or manual control input with minimal external circuitry. Wiper position of the DS1804 can be stored in EEPROM memory on demand. The devices wiper position is manipulated by a three-terminal port that provides an increment/ decre...
Vendor:CYPRESSPackage Cooled:N/AD/C:2004
ADSC write accesses are initiated when the following condi- tions are satisfied: (1) ADSC is asserted LOW, (2) ADSP is deasserted HIGH, (3) CE1, CE2, CE3 are all asserted active, and (4) the appropriate combination of the write inputs (GW, BWE, and BW[A:D]) are asserted active to conduct a write to the desired byte(s). ADSC-triggered write accesses require a single clock cycle to complete. The address presen...
Vendor:CYPRESSPackage Cooled:CYRRESSD/C:2004
ADSC write accesses are initiated when the following condi- tions are satisfied: (1) ADSC is asserted LOW, (2) ADSP is deasserted HIGH, (3) CE1, CE2, CE3 are all asserted active, and (4) the appropriate combination of the write inputs (GW, BWE, and BW[A:D]) are asserted active to conduct a write to the desired byte(s). ADSC-triggered write accesses require a single clock cycle to complete. The address presen...
Vendor:NSPackage Cooled:SOP-14D/C:SX
Vendor:300
Use crystal or cera-lock filter manufacturers recommended values for CL1 and CL2 load capacitors. 0.1-µF bypass capacitor for power pins should always be used and placed close to their VDD pin. R1 and R2 are series termination resistors for impedance matching.
Vendor:100Package Cooled:TO-3P
Ring provides half the two-wire con- nection to the telephone network, RJ-11 Pin 4. A 1500 volt barrier isolates Ring from all other circuits. This isolation must be preserved throughout the system. The battery voltage on Ring may be positive or negative with respect to Tip.
Vendor:IC WORKSPackage Cooled:SMDD/C:01+
• Microchips Worldwide Web site; http://www.microchip.com • Your local Microchip sales office (see last page) • The Microchip Corporate Literature Center; U.S. FAX: (480) 792-7277 When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include liter- ature number) you are using.
Vendor:IC WORKSPackage Cooled:1000D/C:08+
• Microchips Worldwide Web site; http://www.microchip.com • Your local Microchip sales office (see last page) • The Microchip Corporate Literature Center; U.S. FAX: (480) 792-7277 When contacting a sales office or the literature center, please specify which device, revision of silicon and data sheet (include liter- ature number) you are using.
The W161H single-chip solution is an integrated circuit intended for use as a low-cost multiband FSK or OOK transceiver to establish a frequency-programmable, half-duplex, bidirectional RF link. The multichannel transceiver is intended for digital (FSK, OOK) modulated applications in the North American and European 315-MHz, 433-MHz, 868-MHz, and 915-MHz ISM bands. The single-chip transceiver operates dow...
Vendor:CYPRESSPackage Cooled:SSOPD/C:01+
DC bus capacitor filter with NTC inrush current limiter IR2233 monolithic 3-phase HVIC driver Driver stage for brake transistor On-board +15V and +5V power supply MOV surge suppression at input DC bus voltage and current feedback Protection for short-circuit, earth/ground fault, overtemperature and overvoltage Terminal blocks for 3-phase input/output and brake connections
Vendor:IC WORKSPackage Cooled:216D/C:01+
Digitally programmable dual function digital inputs. Can be programmed to monitor the VID pins of the Pentium/PRO and Pentium II processors, that indicate the operating voltage of the processor, or as interrupt inputs. The values are read in the VID/Fan Divisor Register and the VID4 Register. These inputs have on-chip 100 kΩ pullup resistors.
Vendor:MOTOROLAPackage Cooled:TO-3D/C:08+
1. Voltage accuracy on 3VDC and triple outputs 3% Max. Single outputs can be trimmed 5%. 2. Load regulation 2% for dual and triple outputs. 3. Triple outputs require minimum of 10% load for rated performance. 4. Remote on/off standard on triple output units, add suffix E to part number for option on single and dual output units.
Package Cooled:TO-3P
HT1623 is a peripheral device specially designed for I/O type MCU used to expand the display capability. The max. display segment of the device are 384 patterns (48´8). It also supports serial interface, buzzer sound, watchdog timer or time base timer functions. The HT1623 is a memory mapping and multi-function LCD controller. The software configuration feature of the
• Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs • Attenuates wander from 2.1 Hz • Fast lock mode • Provides Time Interval Error (TIE) correction • MTIE of 600 ns • JTAG boundary scan • Holdover st...
Vendor:cypPackage Cooled:cypD/C:dc02
Vendor:CYPRESSPackage Cooled:SOP-8D/C:01+
The TURBOTRANSCEIVER is compatible with the require- ments of the proposed IEEE 896 Futurebus draft standard. It is similar to the DS3896/97 BTL TRAPEZOIDAL™ Trans- ceivers but the trapezoidal feature has been removed to improve the propagation delay. A stripline backplane is there- fore required to reduce the crosstalk induced by the faster rise and fall times. This device can drive a 10Ω ...
Package Cooled:SOP8
Vendor:CYPREISPackage Cooled:SSOP48D/C:0
An external fine trim may be desired to set the output level to exactly 10.000 volts within less than a millivolt (calibrated to a main system reference). System calibration may also require a reference slightly different from 10.00 volts. In either case, the optional trim circuit shown in Figure 2 can offset the output by up to 30 millivolts (with the 22 Ω resistor), if needed, with minimal effec...
Package Cooled:SOP16D/C:08+
(VCC - VEE = 3.0V to 5.5V, outputs loaded with 50Ω 1% to VCC - 2V, VIHD - VILD = 0.15V to 1V, fIN 500MHz, input duty cycle = 50%, input transition time = 125ps (20% to 80%). Typical values are at VCC - VEE = 3.3V, VIHD = VCC - 1V, VILD = VCC - 1.5V, unless other- wise noted.) (Note 6)
Vendor:CYPRESSPackage Cooled:SOP-8D/C:05+
With chip select (CS) inactive (high), the ADDRESS and I/O CLOCK inputs are initially disabled and DATA OUT is in the high-impedance state. When the serial interface takes CS active (low), the conversion sequence begins with the enabling of I/O CLOCK and ADDRESS and the removal of DATA OUT from the high-impedance state. The host then provides the 4-bit channel address to ADDRESS and the I/O CLOCK sequence...
Vendor:cypPackage Cooled:cypD/C:dc01
For M74HC4020 twelve kind of divided output are provided; 1st and 4th stage to 14th stage. The maximum division available at last stage is 1/16384 x fIN at clock. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
Vendor:MAGPackage Cooled:n/aD/C:97
The HD407A4359 is a PROM version (ZTAT™microcomputer). A program can be written to the PROM by a PROM writer, which can dramatically shorten system development periods and smooth the process from debugging to mass production. (The ZTAT™ version is 27256-compatible.)
Each device includes on a single silicon chip a voltage regulator, qua- dratic Hall-voltage generator, temperature compensation circuit, signal amplifier, Schmitt trigger, and a buffered open-collector output to sink up to 25 mA. The on-board regulator permits operation with supply voltages of 3.8 to 24 volts.
The power dissipation of the TSOP−6 is a function of the drain pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA...
Vendor:MAGNECRAFTPackage Cooled:DIP-8
TRANSMIT SECTION The transmit section input is an operational amplifier with provision for gain adjustment using two external resistors, see Figure 4. The low noise and wide bandwidth allow gains in excess of 20 dB across the audio passband to be realized. The op amp drives a unity-gain filter consisting of RC active
Capacitor Table Table 2-1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The recommended number of capacitors required at both the input and output buses is identified for each capacitor type.
Vendor:IC WORKSPackage Cooled:SMDD/C:08+
Operation-PC Uses FA computer to display different kinds of settings, self-diagnosis and deviation trends. Communications are carried out via the microcomputer and Ethernet, settings are carried out via a microcomputer, and status detection information is sent and received. <Main components> FA3100 main unit (Windows® NT) 15-type color monitor Keyboard Mouse Ethernet board Standar...
Vendor:IC WORKPackage Cooled:SSOP-28D/C:99+
Note 1: This device has been designed to perform to the parameters of its data sheet. It has been tested to an electrical specification designed to determine its conformance with these parameters. Due to process differences in the manufacture of this device, this device may have different performance characteristics than its earlier version. These differences may cause this device to perform differently...