Index "X"Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
(5-V Input and Output Voltages With 3.3-V VCC) Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25C Support Unregulated Battery Operation Down to 2.7 V Ioff and Power-Up 3-State Support Hot Insertion Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Latch-Up Performance Exceeds 500 mA Per JESD 17 ESD Protection Exceeds JESD 22 − 2000-V Human-Bod...
Vendor:TOREXPackage Cooled:smdD/C:06+
FET control: Optional. Output during every Read and Write access. Is provided to control isolation switches on modules. Open drain output. Pullup resistor must be tied to VDDQ at sec- ond level of assembly. The QFC pin is present on this product version, but all timings parameters related to this pin are not tested on the final product and are only guaranteed by design.
Vendor:TOREXPackage Cooled:smdD/C:06+
Input Zener Voltage IGBT Chips Over Heating Protec. Temp. Level Hysteresis Inverter Collector Current Protection Level Over Current Detecting Time Alarm Signal Hold Time Over Current Detecting Resistance Value Under Voltage Protection Level Hysteresis
Vendor:TOREXPackage Cooled:smdD/C:06+
The control input pin of the regulator. This pin via a 10V resistor is connected to the 5V supply to provide the base current for the pass transistor of both regulators. This allows the regulator to have very low dropout voltage which allows one to generate a well regu- lated 2.5V supply from the 3.3V input. A high frequency, 1mF capacitor is connected between this pin and VIN pin to insure stability.
Vendor:TOREXPackage Cooled:smdD/C:06+
The DS1265W provides full functional capability for VCC greater than 3.0V and write protects by 2.8V. Data is maintained in the absence of VCC without any additional support circuitry. The nonvolatile static RAMs constantly monitor VCC. Should the supply voltage decay, the NV SRAMs automatically write protect themselves, all inputs become dont care, and all outputs become high-impedance. As VCC falls below ap...
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
I = Temperature range D = Small Outline Package (SO) - also available in Tape & Reel (DT) P = Thin Shrink Small Outline Package (TSSOP) - only available in Tape & Reel (PT) L = Tiny Package (SOT23-5) - only available in Tape & Reel (LT)
Vendor:TOREXPackage Cooled:smdD/C:O5
Operating voltage VCC C Read: 2.0V~5.5V C Write: 2.4V~5.5V Low power consumption C Operating: 5mA max. C Standby: 10mA max. User selectable internal organization C 2K(HT93LC56): 256´8 or 128´16 3-wire Serial Interface Write cycle time: 5ms max.
Vendor:TOREXPackage Cooled:smdD/C:06+
1) The 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via.
Vendor:TOREXPackage Cooled:smdD/C:06+
1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.
Vendor:TOREXPackage Cooled:smdD/C:06+
DATEL's new DMS-3019X Series, 3½ Digit, LCD Display, Digital Panel Voltmeters provide DP-650 users with a superior-quality alternate source. The DMS-3019X Series input/output connector is pin-compatible with nearly all DP-650 applications. Only minor sheet-metal modifications are needed to attain all the advantages offered by the DMS-3019X Series digital voltmeters. Three differential, high-imped...
Vendor:TOREXPackage Cooled:smdD/C:06+
Portable battery-powered applications Waveform generators Analog processing Instrumentation applications Programmable amplifiers and attenuators Digitally-controlled calibration Programmable filters and oscillators Composite video Ultrasound Gain, offset, and voltage trimming
Vendor:TOREXPackage Cooled:smdD/C:06+
Portable battery-powered applications Waveform generators Analog processing Instrumentation applications Programmable amplifiers and attenuators Digitally-controlled calibration Programmable filters and oscillators Composite video Ultrasound Gain, offset, and voltage trimming
Vendor:TOREXPackage Cooled:smdD/C:06+
1 1 2 Selecting An External ENDEC An option is provided on SONIC to disable the on-chip ENDEC unit and use an external ENDEC The internal IEEE 802 3 ENDEC can be bypassed by connecting the EXT pin to VCC (EXT e 1) In this mode the MAC signals are redirect- ed allowing an external ENDEC to be used See Section 5 2 for the alternate pin definitions
Vendor:TOREXPackage Cooled:smdD/C:06+
The HAL 805 is programmable by modulating the sup- ply voltage. No additional programming pin is needed. The easy programmability allows a 2-point calibration by adjusting the output voltage directly to the input sig- nal (like mechanical angle, distance, or current). Indi- vidual adjustment of each sensor during the cus- tomers manufacturing process is possible. With this calibration procedure, the ...
Vendor:in stockPackage Cooled:smdD/C:05+
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Vendor:in stockPackage Cooled:smdD/C:05+
* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Vendor:TOREXPackage Cooled:smdD/C:06+
NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only o...
Vendor:TOREX
Dimensions InchesMillimeters MinMaxMinMax .178.1954.524.95 .170.2104.325.33 .209.2305.315.84 .100 TP2.54 TP .016.021.406.533 .500.750 12.70 19.05 .016.019.41.48 .0501 .27 .2506.35 .1002.54 .0401.02 .028.048.711.22 .036.046.911.17 .007.18 45 TP
Vendor:TOREX
independently for each of the two registers; this input also can be disabled for either flip-flop. A separate global Set/ Reset line (not shown in Figure 1) sets or clears each register during power-up, reconfiguration, or when a dedi- cated Reset net is driven active. This Reset net does not compete with other routing resources; it can be connected to any package pin as a global reset input.
Vendor:TOREX
independently for each of the two registers; this input also can be disabled for either flip-flop. A separate global Set/ Reset line (not shown in Figure 1) sets or clears each register during power-up, reconfiguration, or when a dedi- cated Reset net is driven active. This Reset net does not compete with other routing resources; it can be connected to any package pin as a global reset input.
Vendor:TOREX
Lead temperature, Tsol, 1,6 mm (1/16 inch) from case for 10 seconds300 (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for...
Vendor:TOREXD/C:06+
Output frequency range: 1050 MHz to 1250 MHz Divide-by-2 output 3.0 V to 3.6 V power supply 1.8 V logic compatibility Integer-N synthesizer Programmable dual-modulus prescaler 8/9, 16/17, 32/33 Programmable output power level 3-wire serial interface Analog and digital lock detect Hardware and software power-down mode
Vendor:TOREXD/C:06+
The ISP10160A is designed to interface directly to the PCI bus and operate as a 64-bit DMA bus master. This operation is accomplished through a PCI bus interface unit (PBIU) that contains an on-board DMA controller. The PBIU generates and samples PCI control signals, generates host memory addresses, and facilitates the transfer of data between host memory and the on-board DMA FIFO. It also allows the...
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Caution: The BiCMOS inherent to this design of this component increases the components susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
enabled and synchronous loading occurs on the next clock pulse. Clocking is accomplished on the low-to-high level edge of the clock pulse. The CLOCK-INHIBIT input should be changed to the high only while the clock input is held high. A direct clear input overrides all other inputs, including the clock, and sets all flip-flops to zero. Functional details are shown in the truth table and the timing ch...
Vendor:TOREXPackage Cooled:smdD/C:06+
The autoselect mode provides manufacturer and de- vice identification through identifier codes on DQ0C DQ7. This mode is primarily intended for programming equipment to automatically match a device to be pro- grammed with its corresponding programming algo- rithm. This mode is functional in the 25C 5C ambient temperature range that is required when pro- gramming the device.
Vendor:TOREXD/C:08+
Instructions, addresses, and data are clocked into the DI pin on the rising edge of the clock (SK). The DO pin is normally in a high impedance state, except when reading data from the device, or when checking the ready/busy status after a write operation.
Vendor:TOREXD/C:06+
Instructions, addresses, and data are clocked into the DI pin on the rising edge of the clock (SK). The DO pin is normally in a high impedance state, except when reading data from the device, or when checking the ready/busy status after a write operation.
Vendor:TOREXPackage Cooled:smdD/C:06+
Fully Integrated VCC and Vpp Switching for Dual Slot PC CardTM Interface 3-Lead Serial Interface Compatible With CardBusTM Controllers 3.3V Low Voltage Mode Meets PC Card Standards RESET for System Initialization of PC Cards 12V Supply Can Be Disabled Except During 12V Flash Programming Short Circuit and Thermal Protection 28 Pin and 30 Pin SSOP Compatible With 3.3V, 5V and 12V PC Cards Low RDS(on) ...
Vendor:TOREXPackage Cooled:smdD/C:06+
management uses two areas in memory one for indicating status and control information and the other for fetching packet data The system can create a transmit queue allow- ing multiple packets to be transmitted from a single transmit command The packet data can reside on any arbitrary byte boundary and can exist in several non-contiguous locations
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREX In series stockPackage Cooled:smdD/C:2007
The EB-2100x accommodates either a coaxial or an optical S/PDIF digital audio interface. Either input may be selected by moving jumper J2. Connect J2 pins 1-2 for coaxial or J2 pins 2- 3 for optical S/PDIF. A Crystal CS8415A digital audio interface receiver is utilized to convert the incoming S/PDIF signal to serial I2S used by the DDX-2000. The receiver also recovers a 256*Fs clock synchronized to the inco...
Vendor:TOREXPackage Cooled:smdD/C:06+
The 82091AA Advanced Integrated Peripheral (AIP) is an integrated I O solution containing a floppy disk controller 2 serial ports a multi-function parallel port an IDE interface and a game port on a single chip The integration of these I O devices results in a minimization of form factor cost and power consumption The
Vendor:TOREX In series stockPackage Cooled:SOT89D/C:07+ROHS
Vendor:TOREXPackage Cooled:smdD/C:06+
Notes: 1. The algebraic convention, where most negative value is a minimum and most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. R = R MAX - R 5. Flatness is defined as the difference between the maximum and minimum value of On-Resistance measured. 6. Leakage parameters a...
Vendor:TOREXPackage Cooled:smdD/C:06+
Programmable High-Speed Synchronous Communications Engine (SCE) with a 128- Byte FIFO and Programmable Threshold High-Speed NS16C550A-Compatible Universal Asynchronous Receiver/ Transmitter Interface (ACE UART2) with 16- Byte Send and Receive FIFOs ISA Single-Byte and Burst-Mode DMA and Interrupt-Driven Programmed I/O with Zero Wait State and String Move Timing 16-bit CRC-CCITT and 32-bit IEEE 802 CRC32 ...
Vendor:TOREXPackage Cooled:smdD/C:06+
Notes: 1. Derate linearly as shown in Figure 4. 2. Drive currents between 1 mA and 30 mA are recommended for best long term performance. 3. Operating at currents below 1 mA is not recommended. Please contact your Agilent representative for further information. 4. Maximum temperature for tape and reel packaging is 60C.
Vendor:TOREXPackage Cooled:smdD/C:O4
No license is granted, implied or otherwise, under any patent or patent rights of VIA Technologies. VIA Technologies makes no warranties, implied or otherwise, in regard to this document and to the products described in this document. The information provided by this document is believed to be accurate and reliable to the publication date of this document. However, VIA Technologies assumes no responsibility f...
Vendor:TOREXD/C:O4
No license is granted, implied or otherwise, under any patent or patent rights of VIA Technologies. VIA Technologies makes no warranties, implied or otherwise, in regard to this document and to the products described in this document. The information provided by this document is believed to be accurate and reliable to the publication date of this document. However, VIA Technologies assumes no responsibility f...
Vendor:TOREXPackage Cooled:600
The internal gating of chip-enable (CE) signals prevents erroneous data from corrupting CMOS RAM during an under-voltage condition. The TPS3613 use a series transmission gate from CEIN to CEOUT. During normal operation (reset not asserted), the CE transmission gate is enabled and passes all CE transitions. When reset is asserted, this path becomes disabled, preventing erroneous data from corrupting the CM...
Vendor:TOREXPackage Cooled:N/A
The g-cell is a mechanical structure formed from semiconductor materials (polysilicon) using semiconductor processes (masking and etching). It can be modeled as two stationary plates with a moveable plate in-between. The center plate can be deflected from its rest position by subjecting the system to an acceleration (Figure 2).
This material and the information herein is the property ofFuji Electric Co.,Ltd. They shall be neither reproduced, copied,lent, or disclosed in any way whatsoever for the use of anythird party nor used for the manufacturing purposes withoutthe express written consent of Fuji Electric Co.,Ltd.
ML22Q54 The ML22Q54 is a speech synthesis device with a 4-Mbit flash memory built in. The voice data can be easily written to the flash memory using a special tool. The on-chip flash memory product is suitable for the diversified low volume production or short delivery time applications that the on-chip mask ROM product cannot support. The ML22Q54 is most suitable for evaluation because the circui...
Vendor:TOREXPackage Cooled:smdD/C:06+
The MicroMonitor is a precision temperature-compensated reference and comparator that monitors certain vital status conditions for a microprocessor. When a sense input detects an out-of-tolerance (VCC) condition, a nonmaskable interrupt is generated. As the voltage at the device degrades, an internal power- fail signal is generated that can be used to reset the processor. When VCC returns to an in-tolerance l...
Vendor:TOREXPackage Cooled:smdD/C:06+
• 6-channel PWM control with MOSFET direct driving : 5-channel for Pch-MOSFET, 1channel for Nch-MOSFET • Low input voltage: 4.5V to 20V • 1.5% high accuracy bandgap reference • Low power consumption by means of CDMOS Standby mode: 10µA(max.) Operating mode: 6mA(max.) • Soft start function for each channel • ON/OFF function for each channel • Timer ...
Vendor:TOREXPackage Cooled:SO89D/C:05+
To reset the new VTRIP voltage, apply the desired VTRIP threshold voltage to the Vcc pin and tie the WP pin to the programming voltage VP. Then send a WREN command, followed by a write of data 00h to address 03h. CS going HIGH on the write operation initiates the VTRIP programming sequence. Bring WP LOW to com- plete the operation.
Vendor:TOREXPackage Cooled:SOT-89-6D/C:08+
These octal buffers and line drivers are designed to have the performance of the popular SN54ALS240A/ SN74ALS240A series and, at the same time, offer a pinout with inputs and outputs on opposite sides of the package. This arrangement greatly facilitates printed circuit board layout.
Vendor:TOREXPackage Cooled:SOT-89-6D/C:08+
The XC6372C281PR/3A and XC6372C281PR/3A are dual J-K flip-flops with set and reset that utilize the Harris Advanced CMOS Logic technology. These flip-flops have independent J, K, Set, Reset and Clock inputs and Q and Q outputs. The XC6372C281PR/3A and XC6372C281PR/3A changes state on the positive-going transition of the clock. Set and Reset are accomplished asynchronously by low...
Vendor:TOREXPackage Cooled:SOT-89-6D/C:08+
The XC6372C281PR/3A and XC6372C281PR/3A are dual J-K flip-flops with set and reset that utilize the Harris Advanced CMOS Logic technology. These flip-flops have independent J, K, Set, Reset and Clock inputs and Q and Q outputs. The XC6372C281PR/3A and XC6372C281PR/3A changes state on the positive-going transition of the clock. Set and Reset are accomplished asynchronously by low...
Vendor:TOREXPackage Cooled:smdD/C:06+
The voltage drop (VSR) across the sense re- sistor RS is monitored and integrated over time to interpret charge and discharge activ- ity. The SR input is tied between the nega- tive terminal of the battery and the sense re- sistor. VSR < VSS indicates discharge, and VSR > VSS indicates charge. The effective voltage drop, VSRO, as seen by the bq2050 is VSR + VOS .
Vendor:TOREXPackage Cooled:smdD/C:06+
The voltage drop (VSR) across the sense re- sistor RS is monitored and integrated over time to interpret charge and discharge activ- ity. The SR input is tied between the nega- tive terminal of the battery and the sense re- sistor. VSR < VSS indicates discharge, and VSR > VSS indicates charge. The effective voltage drop, VSRO, as seen by the bq2050 is VSR + VOS .
Vendor:TOREXPackage Cooled:smdD/C:06+
D/C:08+/09+
Features/Benefits: •QuadRomTM frequency selection. •Programmable asynchronous 3V66/PCI frequency. •Programmable output frequency. •Programmable output divider ratios. •Programmable output rise/fall time. •Programmable output skew. •Programmable spread percentage for EMI control. •Programmable watch dog safe frequency. •Support I2C Index read/wr...
Vendor:TOREXPackage Cooled:N/AD/C:02+
When setting BC1 and BC2 at a high level or CS at a low level, the chips are in a non-selectable mode in which both reading and writing are disabled. In this mode, the output stage is in a high-impedance state, allowing OR-tie with other chips and memory expansion by BC1, BC2 and CS. The power supply current is reduced as low as the stand-by current which is specified as ICC3 or ICC4, and the memory ...
Vendor:TOREXPackage Cooled:SOT-89D/C:02+
When setting BC1 and BC2 at a high level or CS at a low level, the chips are in a non-selectable mode in which both reading and writing are disabled. In this mode, the output stage is in a high-impedance state, allowing OR-tie with other chips and memory expansion by BC1, BC2 and CS. The power supply current is reduced as low as the stand-by current which is specified as ICC3 or ICC4, and the memory ...
Vendor:TOREXPackage Cooled:N/AD/C:04+
Meet or Exceed the Requirements of TIA/EIA-232-F and ITU Recommendation V.28 Very Low Power Consumption . . . 5 mW Typ Wide Driver Supply Voltage Range . . . 4.5 V to 15 V Driver Output Slew Rate Limited to 30 V/µs Max Receiver Input Hysteresis . . . 1000 mV Typ Push-Pull Receiver Outputs On-Chip Receiver 1-µs Noise Filter Functionally Interchangeable With Motorola MC145406 and Texas Instru...
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
D/C:08+
Cell Available (FIFO-a)Receive side. Rx mode: CLAVR notifies UtopiaFIFO an entire cell is available for transfer. It is an input signal. Tx mode: CLAVR notifies sending agent the UtopiaFIFO can accept an entire cell. It is an output signal.
Package Cooled:32660D/C:08+
Cell Available (FIFO-a)Receive side. Rx mode: CLAVR notifies UtopiaFIFO an entire cell is available for transfer. It is an input signal. Tx mode: CLAVR notifies sending agent the UtopiaFIFO can accept an entire cell. It is an output signal.
Vendor:TOREXPackage Cooled:460
Vendor:TOREXPackage Cooled:SOT-89-6D/C:05+
The DPL 4519G processor is designed as part of the Micronas chip set for digital and analog Surround Sys- tems i. e. Dolby Digital, MPEG 2 Audio, or Dolby Pro- Logic. The combination of MAS 3528E, DPL 4519G, and MSP 44x0G is a complete 5.1 channel Dolby Digi- tal decoder and playback solution, while DPL 4519G and MSP 44x0G alone, represent a complete Dolby Surround Pro Logic system.
Vendor:TOREXPackage Cooled:SO-23D/C:07+
The device also has a 96 I/O cells, each of which is directly connected to an I/O pin. Each I/O cell can be individually programmed to be a combinatorial input, registered input, latched input, output or bi-directional I/O pin with 3-state control. Additionally, all outputs have selectable polarity, active high or active low. The signal voltage levels are TTL-compatible, and the output drivers can sou...
The blocks in the memory are asymmetrically ar- ranged, see Tables 3A and 3B, Block Addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the microprocessor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the ap- plication m...
Vendor:TOREXD/C:06+
Operating Temperature Range: C 40 to 85C Low Power Consumption Through Use of CMOS Technology 3.0 to 9.0 V Supply Range OnC or OffCChip Reference Oscillator Operation Lock Detect Signal Dual Modulus/Parallel Programming 8 UserCSelectable R Values: 8, 64, 128, 256, 512, 1024, 1160, 2048 N Range = 3 to 1023, A Range = 0 to 63 Chip Complexity: 8000 FETs or 2000 Equivalent Gates See Application N...
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:06+
Vendor:TOREXPackage Cooled:smdD/C:MP3IC
!Features 1) VDD=3.3V5% operating guaranteed 2) Oscillating range of VCO is 37MHz~60MHz 3) High-speed edge trigger type phase comparator 4) VCO can be fine-adjusted by external resistor. 5) VCO and phase comparator can be controlled independently. 6) Small SSOP-B14 package
Vendor:TOREXPackage Cooled:smdD/C:O4MP3I
Referenced to VCCA Voltage VCC Isolation Feature − If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range Ioff Supports Partial-Power-Down Mode Operation I/Os Are 4.6-V Tolerant Bus Hold o...