X28C64EM-25

Vendor:XICORPackage Cooled:218D/C:218

X28C64EMB-25

Vendor:XICORD/C:00+

• Short C when two or more lines are short-circuited together. • Open C Lack of continuity between pins at both ends of the cable. • Crossed pair C When a pair is connected to different pins at each end (i.e. Pair 1 is connected

X28C64EMB-30

Vendor:XICORPackage Cooled:LCCD/C:00+

X28C64J-12

Vendor:XICORPackage Cooled:PLCC-32

X28C64J-15

Vendor:N/APackage Cooled:PLCCD/C:97+

CPU_STOP# is an input signal used to turn off the CPU clocks for low power operation. CPU_STOP# is asserted asynchronously by the external clock control logic with the rising edge of free running PCI clock and is internally synchronized to the external PCICLK_F output. All other clocks continue to run while the CPU clocks are

X28C64J-15(EEPROMS8K8)

1. Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

X28C64J20

High current sink/source 25 mA/25 mA Up to four external interrupt pins Up to three 16-bit timer/counters Up to two 8-bit timer/counters with 8-bit period register (time-base for PWM) Secondary LP oscillator clock option - Timer1 Up to five Capture/Compare/PWM (CCP) modules CCP pins can be configured as: C Capture input: 16-bit, resolution 6.25 ns (TCY/16) C Compare: 16-bit, max. resolution 100 ns (TCY) C...

X28C64J-70

Vendor:XICORPackage Cooled:PLCC-32

X28C64JI-12

Vendor:XICORPackage Cooled:PLCC-32

The TLV247x is a family of CMOS rail-to-rail input/output operational amplifiers that establishes a new performance point for supply current versus ac performance. These devices consume just 600 µA/channel while offering 2.8 MHz of gain-bandwidth product. Along with increased ac performance, the amplifier provides high output drive capability, solving a major shortcoming of older micropower operatio...

X28C64JI20

X28C64JI-20

D/C:600

The MSAU300 series has limitation of maximum connected capacitance at the output. The power module may be operated in current limiting mode during start-up, affecting the ramp-up and the startup time. The maximum capacitance can be found in the data sheet.

X28C64JI-20SI

Vendor:XICORPackage Cooled:PLCC32

These Intersil RS-485/RS-422 devices are ESD protected, fractional unit load (UL), BiCMOS, 5V powered, single transceivers that meet both the RS-485 and RS-422 standards for balanced communication. Each driver output/ receiver input is protected against 15kV ESD strikes, without latch-up. Unlike competitive devices, this Intersil family is specified for 10% tolerance supplies (4.5V to 5.5V).

X28C64JI-25

The factory pre-set output voltage of Power Trends 30W series of isolated DC/DC converters may be adjusted within a nominal 10% range. This is accomplished with the addition of a single external resistor. For the input voltage range specified in the data sheet, Table 1 gives the allowable adjustment range for each model as Vo (min) and Vo (max).

X28C64JI-90

Vendor:XICORPackage Cooled:PLCC-32

X28C64JM-20DA

Vendor:PLCCPackage Cooled:XICORD/C:150

Pay particular attention that parasitic couplings are minimized from the output to the input signal terminals. The parasitic feedback may cause oscillations or spurious waveform shapes on the edges of signal transitions. Since the input operates with signals down to 1.2V even small coupled voltages may cause problems. Use of a solid ground plane and good power and signal layout practices will prevent this pro...

X28C64JM-20DA

Vendor:XICORPackage Cooled:2001

Pay particular attention that parasitic couplings are minimized from the output to the input signal terminals. The parasitic feedback may cause oscillations or spurious waveform shapes on the edges of signal transitions. Since the input operates with signals down to 1.2V even small coupled voltages may cause problems. Use of a solid ground plane and good power and signal layout practices will prevent this pro...

X28C64JT-20

Package Cooled:PLCCD/C:PLCC

X28C64MB-25

Vendor:XICORPackage Cooled:DIPD/C:N/A

X28C64P-12

Vendor:XICORPackage Cooled:DIPD/C:OO12

Write accesses to the RTICNTR register will clear the CNTR (21 bit counter), which causes a Tap interrupt if the corresponding bit switches from a 1 to a 0 when the suspend signal is asserted. This is the same problem as RTI#3, however, on the initial fix of RTI#3, the case where the suspend signal is asserted because an emulator breakpoint was not considered. This problem occurs when the emulator has set ...

X28C64P-15

Vendor:XICORD/C:05+

No part of this publication may be reproduced, stored in a retrieval system, transmitted, or translated in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without the prior written permission of ESS Technology, Inc.

X28C64P-25

Vendor:XICORD/C:05+

Recommended Application: ALI - Aladdin V™ - mobile style chipsets Output Features: • 3 - CPUs @ 2.5/3.3V, up to 100MHz. • 3 - AGPCLK @ 3.3V • 13 - SDRAM @ 3.3V • 6 - PCI @ 3.3V • 1 - 48MHz, @ 3.3V fixed. • 1 - REF @ 3.3V, 14.318MHz. Features: • Support power management: CPU, PCI, AGP stop and Power down Mode from I2C programming. • Spread spectrum for ...

X28C64PI-15

Vendor:XICORPackage Cooled:DIPD/C:DIP

Commands are issued to the CSM using standard microprocessor write timings. The CSM acts as an interface between the external microprocessor and the internal WSM. The available commands are listed in Table 1 and the description of these commands are shown in Table 2. When a program or erase command is issued to the CSM, the WSM controls the internal sequences and the CSM only responds to status reads. Af...

X28C64PI-20

Vendor:N/APackage Cooled:N/AD/C:08+09+

Teccor Electronics reserves the right to make changes at any time in order to improve designs and to supply the best products possible. The information in this catalog has been carefully checked and is believed to be accurate and reliable; however, no liability of any type shall be incurred by Teccor for the use of the circuits or devices described in this publication. Furthermore, no license of any patent ri...

X28C64PI-20

Vendor:N/APackage Cooled:N/AD/C:08+09+

Teccor Electronics reserves the right to make changes at any time in order to improve designs and to supply the best products possible. The information in this catalog has been carefully checked and is believed to be accurate and reliable; however, no liability of any type shall be incurred by Teccor for the use of the circuits or devices described in this publication. Furthermore, no license of any patent ri...

X28C64PI25

X28C64PI-25

Vendor:XICORPackage Cooled:DIP

The Fairchild portfolio of Star*Power FETs includes a family of devices in various voltage, current and package styles. The Star*Power family consists of Star*Power and Star*Power Gold products. Star*Power FETs are optimized for total dose and r DS(ON) performance while exhibiting SEE capability at full rated voltage up to an LET of 37. Star*Power Gold FETs have been optimized for SEE and Gate Charge ...

X28C64PI-30

Vendor:XICORPackage Cooled:1358D/C:1358

X28C64SI-15

Vendor:XICORD/C:08+

1. VIH (max) = 3.0V AC.The overshoot voltage duration is 3ns. 2. VIL (min) = -2.0V AC. The undershoot voltage duration is 3ns. 3. Any input 0V VIN VDDQ. Input leakage currents include Hi-Z output leakage for all bi-directional buffers with tri-state outputs. 4. Dout is disabled, 0V VOUT VDDQ.

X28C64SI-15

Vendor:XICORPackage Cooled:SOP28D/C:08+

1. VIH (max) = 3.0V AC.The overshoot voltage duration is 3ns. 2. VIL (min) = -2.0V AC. The undershoot voltage duration is 3ns. 3. Any input 0V VIN VDDQ. Input leakage currents include Hi-Z output leakage for all bi-directional buffers with tri-state outputs. 4. Dout is disabled, 0V VOUT VDDQ.

X28C64SI-70

Vendor:XICORPackage Cooled:.D/C:1600

READ CYCLE tRCRead Cycle Time tAAAddress Access Time tACSChip Select Access Time tOEOutput Enable to Output Valid tBA/LB, /UB Access Time tCLZChip Select to Output in Low Z tOLZOutput Enable to Output in Low Z tBLZ/LB, /UB Enable to Output in Low Z tCHZChip Deselection to Output in High Z tOHZOut Disable to Output in High Z tBHZ/LB, /UB Disable to Output in High Z tOHOutput Hold from Address Chang...

X28C64SM-15

Vendor:XICORD/C:900

NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.

X28C64SM-55

Vendor:XICORD/C:1500

The MAX146/MAX147 12-bit data-acquisition systems combine an 8-channel multiplexer, high-bandwidth track/hold, and serial interface with high conversion speed and low power consumption. The MAX146 oper- ates from a single +2.7V to +3.6V supply; the MAX147 operates from a single +2.7V to +5.25V supply. Both devices analog inputs are software configurable for unipolar/bipolar and single-ended/differential oper...

X28C64T1-15

Vendor:XICOR

Configurable Logic Blocks (CLBs) provide functional elements for combinatorial and synchronous logic, including basic storage elements. BUFTs (3-state buffers) associated with each CLB element drive dedicated segmentable horizontal routing resources. Block SelectRAM memory modules provide large 18 Kbit storage elements of dual-port RAM. Multiplier blocks are 18-bit x 18-bit dedicated multipliers. D...

X28C64T1-15

Vendor:XICORPackage Cooled:SMD

Configurable Logic Blocks (CLBs) provide functional elements for combinatorial and synchronous logic, including basic storage elements. BUFTs (3-state buffers) associated with each CLB element drive dedicated segmentable horizontal routing resources. Block SelectRAM memory modules provide large 18 Kbit storage elements of dual-port RAM. Multiplier blocks are 18-bit x 18-bit dedicated multipliers. D...

X28C64T-15

Vendor:XICORPackage Cooled:5500

All inputs and outputs are ESD and short circuit protected making the LX1991 an exceptionally robust component. The device also includes thermal shutdown however it is not recommended to short the ISET+ and ISET- inputs together while shorting the outputs to 40V as the power dissipation under these conditions is the greatest.

X28C64TI-15

Vendor:ICPackage Cooled:TSSOPD/C:9928+

SANYO assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all SANYO products described or contained herein.

X28C6J-90/12

Package Cooled:PLCCD/C:04+

* The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may c...

X28H165-12

Vendor:N/APackage Cooled:SOPD/C:06+

The GS71024 is a high speed CMOS static RAM organized as 65,536 words by 24 bits. Static design eliminates the need for external clocks or timing strobes. The GS71024 operates on a single 3.3 V power supply, and all inputs and outputs are TTL- compatible. The GS71024 is available in a 6 mm x 8 mm Fine Pitch BGA package, as well as in a 100-pin TQFP package.

X28H165-12

Vendor:N/APackage Cooled:SOPD/C:06+

The GS71024 is a high speed CMOS static RAM organized as 65,536 words by 24 bits. Static design eliminates the need for external clocks or timing strobes. The GS71024 operates on a single 3.3 V power supply, and all inputs and outputs are TTL- compatible. The GS71024 is available in a 6 mm x 8 mm Fine Pitch BGA package, as well as in a 100-pin TQFP package.

X28H256JM-15

Vendor:XICOKPackage Cooled:PLCC

X28HC16P-20

Vendor:XICORPackage Cooled:.D/C:2896

X28HC16P-35

Vendor:XICORPackage Cooled:3396D/C:3396

X28HC16PI-25

Vendor:XICORPackage Cooled:1358D/C:1358

X28HC16S-12

Vendor:XICORPackage Cooled:SOPD/C:03+

Notes: 1. Failure criterion ; IR > 100 nA at VR = 30 V 2. Please do not use the soldering iron due to avoid high stress to the EFP package. 3. The material of lead is exposed for cutting plane. Therefor, soldering nature of lead tip part is considered as unquestioned. Please kindly consider soldering nature.

X28HC16S-12

Vendor:XICORPackage Cooled:SOPD/C:03+

Notes: 1. Failure criterion ; IR > 100 nA at VR = 30 V 2. Please do not use the soldering iron due to avoid high stress to the EFP package. 3. The material of lead is exposed for cutting plane. Therefor, soldering nature of lead tip part is considered as unquestioned. Please kindly consider soldering nature.

X28HC256

Vendor:XICORPackage Cooled:DIPD/C:04+

X28HC256

Vendor:XICORPackage Cooled:DIPD/C:04+

X28HC256-12

D/C:05+

Several pins on this device serve as dual function in- put/output pins. During the initial application of VDD to the device, this type of pin functions as an input pin. Upon completion of power-up, the logic state present on the pin is latched internally, and the pin is converted to an output driver. An external 10kΩ pull-down resistor to ground is required for a logic low and a 10kΩ pull-up resi...

X28HC256-15

Vendor:XICORPackage Cooled:DIPD/C:99+

NanoStar and NanoFree Packages Low Static-Power Consumption; ICC = 0.9-µA Max Low Dynamic-Power Consumption; Cpd = 4 pF Typical at 3.3 V Low Input Capacitance; Ci = 1.5 pF Typical Low Noise − Overshoot and Undershoot <10% of VCC Ioff Supports Partial-Power-Down Mode Operation Input Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the Input (V...

X28HC256-20PC

Vendor:XICORD/C:DIP

X28HC256-25DI

Vendor:XICORD/C:DIP

X28HC256D

Vendor:XICORPackage Cooled:1000

X28HC256D

Vendor:XICORPackage Cooled:1000

X28HC256D-10

Vendor:XICORD/C:N/A

Note: Agilent Technologies encoders are not recommended for use in safety critical applica- tions. Eg. ABS braking systems, power steering, life support systems and critical care medical equipment. Please contact sales representative if more clarification is needed.

X28HC256D-12

Vendor:XICORD/C:99+

96 Outputs Plasma Display Driver 90V Absolute Maximum Rating Reduced EMI (Electro Magnetic Interference) 3.3V / 5V Compatible Logic -40 / 30 mA Source / Sink Output Mos 6 Bit Data Bus (40 MHz) BCD Process Packaging Adapted to Customer Request (DICE, COB, COF, TAB).

X28HC256D-15

Vendor:XICORPackage Cooled:DIPD/C:98+(original stok)

Monolithic Hall IC for high reliability Single +5 V supply High isolation voltage Lead-free UL recognized Automotive temperature range available End-of-line factory-trimmed for gain and offset Ultra-low power loss: low resistance of primary conductor Ratiometric output from supply voltage Low thermal drift of offset voltage On-chip transient protection Small package size, with easy mounting capability

X28HC256D-15

Vendor:XICORPackage Cooled:DIPD/C:N/A

Monolithic Hall IC for high reliability Single +5 V supply High isolation voltage Lead-free UL recognized Automotive temperature range available End-of-line factory-trimmed for gain and offset Ultra-low power loss: low resistance of primary conductor Ratiometric output from supply voltage Low thermal drift of offset voltage On-chip transient protection Small package size, with easy mounting capability

X28HC256D-20

Vendor:XICORD/C:DIP

X28HC256D-25

Vendor:XICORPackage Cooled:DIP

X28HC256D-70

NOTES: 1. A write occurs during the overlap of E low and W low. 2. If G goes low coincident with or after W goes low, the output will remain in a high impedance state. 3. All timings are referenced from the last valid address to the first transitioning address. 4. If G VIH, the output will remain in a high impedance state. 5. At any given voltage and temperature, tWLQZ (max) is less than tWHQX (min), bot...

X28HC256D-90

Vendor:XICORD/C:98+(original stok)

Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.

X28HC256DI

Vendor:XICORPackage Cooled:.D/C:N/A

Maximum Average Forward Rectified Current @TA = 50 (Note 1) Peak Forward Surge Current, 8.3 ms Single Half Sine-wave Superimposed on Rated Load (JEDEC method ) Maximum Instantaneous Forward Voltage @ 6.0A Maximum DC Reverse Current @ TA=25 at Rated DC Blocking Voltage @ TA=100

X28HC256DI-15/12

X28HC256DI-70

Vendor:XICORPackage Cooled:DIPD/C:N/A

Master/Slave Synchronization. When it is open, a signal synchronous with the turn-off of the inter- nal power is present at the pin. When connected to an external signal at a frequency higher than the internal one, then the device is synchronized by the external signal. Connecting together the SYNC pin of two devices, the one with the higher frequency works as master and the other one, works as slave.

X28HC256DI-90

Vendor:XICORPackage Cooled:DIPD/C:N/A

The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this caseis225 milliwatts.

X28HC256DM-12

Vendor:XICORPackage Cooled:CDIPD/C:ＣＤＩＰ

Notes: 1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded. 2. Dependent on cycle rates. 3. Specified values are obtained with minimum cycle time and the output open. 4. Column-address is changed onc...

X28HC256DM-12

Vendor:XICORPackage Cooled:CDIPD/C:ＣＤＩＰ

Notes: 1. An initial pause of 200 µs is required after power-up followed by eight RAS refresh cycles (RAS-Only or CBR) before proper device operation is assured. The eight RAS cycles wake-up should be repeated any time the tREF refresh requirement is exceeded. 2. Dependent on cycle rates. 3. Specified values are obtained with minimum cycle time and the output open. 4. Column-address is changed onc...

X28HC256DM-15

Vendor:XICORPackage Cooled:CDIPD/C:ＣＤＩＰ

All devices provide break-before-make switching and are TTL and CMOS compatible for maximum application versatility. HI-200/883 is an ideal component for use in high frequency analog switching. Typical applications include signal path switching, sample and hold circuits, digital filters, and op amp gain switching networks.

X28HC256DM-20

Vendor:XICORPackage Cooled:CDIP

Common-mode transient immunity is the maximum common-mode voltage slew rate that can be sustained while maintaining specification-compliant operation. VCM is the common-mode potential difference between the logic and bus sides. The transient magnitude is the range over which the common-mode is slewed. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges.

X28HC256DM-25

Vendor:XICORPackage Cooled:289

In contrast to the direction switches, the hazard input is a low-side type. The pull-up resistor R10 provides the off-state. R3 is a protection resistor for the input stage. Hazard warning can be activated independent of the ignition switch position.

X28HC256DM-25

Vendor:XICORPackage Cooled:CDIP

In contrast to the direction switches, the hazard input is a low-side type. The pull-up resistor R10 provides the off-state. R3 is a protection resistor for the input stage. Hazard warning can be activated independent of the ignition switch position.

X28HC256DM-70

Vendor:XICORPackage Cooled:CDIP

Thus, specifications such as the most negative voltage that may be applied to the outputs only guarantees that if less than C0.5V is applied to the output pin, after that voltage is removed the part will still be functional and its useful life will not have been shortened it is difficult to imagine the meaning of the term functionality WHILE that voltage is applied to the output.

X28HC256DM-90

Vendor:XICORPackage Cooled:CDIP-32D/C:04+

• AN765, Using Microchips Micropower LDOs, DS00765, Microchip Technology Inc., 2002 • AN766, Pin-Compatible CMOS Upgrades to BiPolar LDOs, DS00766, Microchip Technology Inc., 2002 • AN792, A Method to Determine How Much Power a SOT23 Can Dissipate in an Application, DS00792, Microchip Technology Inc., 2001

X28HC256DM-90

Vendor:XICORPackage Cooled:218D/C:04+

• AN765, Using Microchips Micropower LDOs, DS00765, Microchip Technology Inc., 2002 • AN766, Pin-Compatible CMOS Upgrades to BiPolar LDOs, DS00766, Microchip Technology Inc., 2002 • AN792, A Method to Determine How Much Power a SOT23 Can Dissipate in an Application, DS00792, Microchip Technology Inc., 2001

X28HC256DMB-12

Package Cooled:DIP

DESCRIPTION The HCF4094B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4094B is an 8 stages serial shift register having a storage latch associated with each stage for strobing data from the serial input to parallel buffered 3-state outputs. The parallel outputs may be connected directly to common bus lines. Data

X28HC256DMB-15

Vendor:1600Package Cooled:DIP

The AN79Lxx series and the AN79LxxM series are 3-pin, fixed negative output type monolithic voltage regulators. Stabilized fixed output voltage is obtained from un- stable DC input voltage without using any external compo- nents. 12 types of output voltage are available: −4V, −5V, −6V, −7V, −8V, −9V, −10V, −12V, −15V, −18V, −20V and &#...

X28HC256DMB-25

Vendor:XICORD/C:DIP

X28HC256DMB-70

Vendor:XICORD/C:00+

ACPI-PCI Bus Power Management Interface Specification Rev 1.1 Compliant Supports OnNow LAN wakeup, OnNow Ring Indicate, PCI CLKRUN#, PME#, and CardBus CCLKRUN# Compliant with PCI specification v2.2, 2000 PC Card Standard 7.1 Yenta™ PCI to PCMCIA CardBus Bridge register compatible ExCA (Exchangeable Card Architecture) compatible registers mappable in memory and I/O space TM Intel 82365SL P...

X28HC256DMB-90

Vendor:XICORPackage Cooled:DIPD/C:98+(original stok)

Following the successful acknowledgment of the slave address, the bus master sends a byte to the PCA9544A, which is stored in the control register. If multiple bytes are received by the PCA9544A, it saves the last byte received. This register can be written and read via the I2C bus.

X28HC256EMB-15

Vendor:XICORD/C:03+

tpLZ8nsDisable time, low-level-to-high-impedance output (1) All typical values are at 25C and with a 3.3-V supply voltage. (2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) Stimulus jitter has been subtr...

X28HC256EMB-15

Vendor:XICORD/C:03+

tpLZ8nsDisable time, low-level-to-high-impedance output (1) All typical values are at 25C and with a 3.3-V supply voltage. (2) tsk(pp) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when both devices operate with the same supply voltages, at the same temperature, and have identical packages and test circuits. (3) Stimulus jitter has been subtr...

X28HC256EMB-90

Vendor:XICORD/C:98+

X28HC256F-90UM/883C

X28HC256FI-15

X28HC256FMB-12

During reference input rearrangement, such as during a switch from the primary reference (PRI) to the secondary reference (SEC), a step change in phase on the input signals will occur. A phase step at the input of the DPLL would lead to unacceptable phase changes in the output signal.

X28HC256J-10

Vendor:XICORPackage Cooled:PLCC

X28HC256J12

Vendor:TIPackage Cooled:PLCC32D/C:2006

The C-channel provides a means for the system to control and monitor the functionality of the SNIC. This control/status channel is accessed by the system through the ST-BUS or microprocessor port. The C-channel provides access to two registers which provide complete control over the state activationmachine,theD-channelpriority mechanism as well as the various maintenance functions. A detailed description of...

X28HC256J12

Vendor:TIPackage Cooled:PLCC32D/C:2006

The C-channel provides a means for the system to control and monitor the functionality of the SNIC. This control/status channel is accessed by the system through the ST-BUS or microprocessor port. The C-channel provides access to two registers which provide complete control over the state activationmachine,theD-channelpriority mechanism as well as the various maintenance functions. A detailed description of...

X28HC256J-12

D/C:0039/+0021+

VIN =2.7V ~ 5.5V, IOUT =500mA, each switch RL =10 each output RL =10 each output RL =10 each output RL =10 each output each output (output disabled) each output Each output (enable into load), Ramped load applied to enabled output TJ increasing

X28HC256J-15T1

Vendor:XICORPackage Cooled:PLCCD/C:0630+

Positive driver supply pin for the ADC12DL065s output drivers. This pin should be connected to a voltage source of +2.4V to VD and be bypassed to DR GND with a 0.1 µF capacitor. If the supply for this pin is different from the supply used for VA and VD, it should also be bypassed with a 10 µF capacitor. VDR should never exceed the voltage on VD. All 0.1 µF bypass capacitors should be ...

X28HC256J-20

Vendor:1125Package Cooled:PLCC

2. Switch between two audio signals in a single phone, one from a digital baseband detector, the other from an analog baseband detector, to drive the final audio output to an ear piece. In this example, it is assumed that a multifunctional cell phone has both an analog detector and a digital detector, one of which must be selected to drive the final audio output to the ear piece. The NLAS4599 s...

X28HC256J-70

Vendor:1039

The CD54AC374/3A and CD54ACT374/3A are octal D-type, three-state, positive-edge triggered flip-flops that utilize the Harris Advanced CMOS Logic technology. The eight flip- flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE) controls the three-state outputs and is independent of the register operation. When the Output Ena...

X28HC256J-70

Vendor:1039Package Cooled:XIC INTER

The CD54AC374/3A and CD54ACT374/3A are octal D-type, three-state, positive-edge triggered flip-flops that utilize the Harris Advanced CMOS Logic technology. The eight flip- flops enter data into their registers on the LOW-to-HIGH transition of the clock (CP). The Output Enable (OE) controls the three-state outputs and is independent of the register operation. When the Output Ena...

X28HC256JC-15

Vendor:XICORPackage Cooled:PLCC32D/C:PLCC32

NOTES: 1. All typical values are at VCC = 5 V, Tamb = 25 C. 2. This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. 3. Measured by the voltage drop between the A and the B terminals at the indicated current through the switch. On-state resistance is determined by the lowest voltage of the two (A or B) terminals.

X28HC256JI-12

Vendor:XICOR

The On/Off Control (pin 3) may be used for remote on/off operation. As shown in Figure 1A, the control pin is referenced to the CInput (pin 1) and will be pulled to a high state internally. The standard BCP converter (no suffix) is designed so that it is enabled when the control pin is left open and disabled when the control pin is pulled low (to less than +0.6V relative to CInput).

X28HC256JI-15

Vendor:XICORPackage Cooled:PLCCD/C:0029+

FEATURES High Definition Input Formats 8-Bit or 16-Bit (4:2:2) Parallel YCrCb Compliant with: SMPTE 293M (525p) BTA T-1004 EDTV2 525p ITU-R BT.1358 (525p/625p) ITU-R BT.1362 (525p/625p) SMPTE 274M (1080i) at 30 Hz and 25 Hz SMPTE 296M (720p) Other High Definition Formats Using Async Timing Mode High Definition Output Formats YPrPb Progressive Scan (EIA-770.1, EIA-770.2) YPrPb HDTV (EIA 770.3...

X28HC256JM-90

Vendor:XICORPackage Cooled:768D/C:05+

0-0 - Not to be used 0-1 - Data Memory (read only from the microprocessor port) 1-0 - Connection Memory Low 1-1 - Connection Memory High The number expressed in binary notation on these bits refers to the input or output ST-BUS stream which corresponds to the subsection of memory made accessible for subsequent operations.

X28HC256JM-90

Vendor:XICORPackage Cooled:768D/C:05+

0-0 - Not to be used 0-1 - Data Memory (read only from the microprocessor port) 1-0 - Connection Memory Low 1-1 - Connection Memory High The number expressed in binary notation on these bits refers to the input or output ST-BUS stream which corresponds to the subsection of memory made accessible for subsequent operations.

X28HC256JMB-12

Vendor:XICOR

The XC6204 series are highly precise, low noise, positive voltage LDO regulators manufactured using CMOS processes. The series achieves high ripple rejection and low dropout and consists of a standard voltage source, an error correction, current limiter and a phase compensation circuit plus a driver transistor. Output voltage is selectable in 50mV increments within a range of 1.8V ~ 6.0V. The series i...

X28HC256JMB-15

Vendor:XICORPackage Cooled:PLCC

Note 7: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance).