Index "X"Vendor:EXARPackage Cooled:EXARD/C:95+
Excellent temperature stability 20 ppm/C Linear frequency sweep Adjustable duty cycle 0.1% to 99.9% Two or four level FSK capability Wide sweep range 1000:1 min. Logic compatible input and output levels Wide supply voltage range 4V to 13V Low supply sensitivity 0.15%/V Wide frequency range 0.01 Hz to 1 MHz Simultaneous triangle and squarewave outputs
Vendor:ROHMPackage Cooled:06+
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost- full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output is high whenever the FIFO contains 128 or more words and low when it contains 127 or fewer wo...
Vendor:ROHMPackage Cooled:DIPD/C:800
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost- full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output is high whenever the FIFO contains 128 or more words and low when it contains 127 or fewer wo...
Vendor:EXARPackage Cooled:SOP-8D/C:06+
Widebus Family Output Voltage Translation Tracks VCC Supports Mixed-Mode Signal Operation On All Data I/O Ports − 5-V Input Down to 3.3-V Output Level Shift, With 3.3-V VCC − 5-V/3.3-V Input Down to 2.5-V Output Level Shift, With 2.5-V VCC 5-V-Tolerant I/Os, With Device Powered Up or Powered Down Bidirectional Data Flow, With Near-Zero Propagation Delay Low ON-State Resistance (ro...
Vendor:EXARPackage Cooled:500
When RST is driven high, the value on ROMA07 C ROMA00 is latched into the board configuration register in the TI380PCIA configuration space. The value on ROMA07 C ROMA00 can be provided by pullup and pulldown resistors that do not affect operation after reset. This feature allows designers to support jumpers or board stuffing options that can be sensed by software that reads the board configuration regi...
Vendor:EXARPackage Cooled:500
When RST is driven high, the value on ROMA07 C ROMA00 is latched into the board configuration register in the TI380PCIA configuration space. The value on ROMA07 C ROMA00 can be provided by pullup and pulldown resistors that do not affect operation after reset. This feature allows designers to support jumpers or board stuffing options that can be sensed by software that reads the board configuration regi...
Vendor:ROHMPackage Cooled:96D/C:750
The output of the VCOD is the full speed output frequency seen on the CLK. This clock is then sent through the 12-bit internal Feedback Divider (FD). The feedback divider controls how many clocks are seen during every cycle of the input reference.
Package Cooled:盘
With CS Low - Figure 3. After initial power-up and the Hold input inactive (High), as frequencies are input, with the Data Change output as an active (High) indicator, the data is presented at the Data Outputs. If/when the Hold input is placed active (Low), the data at the Data Outputs is frozen and the Data Change output held High at its next active excursion - until the Hold input is returned H...
Package Cooled:1800D/C:ROHM
Xilinx FPGAs require a minimum rated power supply current capacity to insure proper initialization, and the power supply ramp-up time does affect the current required. A fast ramp-up time requires more current than a slow ramp-up time. The slowest ramp-up time is 50 ms. Current capacity is not specified for a ramp-up time faster than 2ms. The current capacity varies linealy with ramp-up time, e.g., ...
Vendor:ROHMPackage Cooled:SOICD/C:9518
The speed and density of the XRA3830FB allows it to be used in a wide range of applications, from replacement of large amounts of 7400-series TTL logic, to complex controllers and multifunction chips. With greater than 25 times the functionality of 20-pin PLDs, the XRA3830FB allows the replacement of over 50 TTL devices. By replacing large amounts of logic, the XRA3830FB reduces board space, part count, and i...
Vendor:EXARPackage Cooled:SOICD/C:94+
The DS1668 and DS1669 Dallastats are digital rheo- stats or potentiometers. These units provide 64 pos- sible uniform tap points over the resistive range and are available in standard versions of 10K, 50K, and 100K ohms. The Dallastats can be controlled by either a mechanicalCtype contact closure input or a digital source input such as a CPU. Wiper position is main- tained in the absence of power whi...
Vendor:ROHMD/C:08+
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Rati...
Vendor:ROHMPackage Cooled:SIP-12
Vendor:ROHMPackage Cooled:SIP-12
Vendor:ROHMPackage Cooled:SIP-12D/C:05+
Package Cooled:SOPD/C:99+
Vendor:EXARD/C:9+
When WEN1 is LOW and WEN2/LD is HIGH, data is written into the FIFO on the rising edge of the WCLK signal. While WEN1 and WEN2/LD are held active, data is continually written into the FIFO on each WCLK cycle. The output port is controlled in a similar manner by a free-running read clock (RCLK) and two read enable pins (REN1, REN2). In addition, the CY7C4261/71/81/91V has an output enable pin (OE). The ...
Package Cooled:SIP-8D/C:95
ITU-T recommendations specify limits on the tolerance, transfer, and generation of jitter. Signal quality at the LA output (as represented by the eye opening) is usually low, mostly as a consequence of nonideal components in the optical transmission system. Because the CDR must accept a certain amount of input data jitter to achieve normal error-free operation, all receiver units in line-termination and reg...
Vendor:1200
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Vendor:ROHMD/C:2060
The delay in this mode is dependent only on the combination of source and destination channels and it is not dependent on the input and output streams. The minimum delay achievable in the MT8985 device is 3 time slots. In the MT8985 device, the information that is to be output in the same channel position as the information is input (position n), relative to frame pulse, will be output in the following frame ...
Package Cooled:DIP
collector Schottky clamped tran- sistor. The shield, which shunts capacitively coupled common mode noise to ground, provides a guaranteed transient immunity specification of 100 V/µs. The output circuit includes an optional integrated 1000 Ω pull- up resistor for the open collector. This gives designers the flexibility to use the internal resistor for pull-up to five volt logic or to use
Package Cooled:DIP
collector Schottky clamped tran- sistor. The shield, which shunts capacitively coupled common mode noise to ground, provides a guaranteed transient immunity specification of 100 V/µs. The output circuit includes an optional integrated 1000 Ω pull- up resistor for the open collector. This gives designers the flexibility to use the internal resistor for pull-up to five volt logic or to use
Vendor:ROHMD/C:02+
All modes (except switching off the standard conversion) are set by appropriate programming of the I2C Bus data bytes. When the operating voltage is switched on, all bits of the associated control registers are set to 0. The address of the I2C Bus is set with signal ADR (24H or 26H).
D/C:08+/09+
Device erasure and programming are accomplished via the command register. The contents of the register serve as input to the internal state machine. The state machine outputs dictate the function of the device. The command register itself does not occupy an addres- sable memory location. The register is a latch used to store the command, along with address and data infor- mation needed to execute the...
Vendor:.Package Cooled:.D/C:2
The XRA6730B will respond with an acknowledge after recognition of a start condition and its slave address. If both the device and a write condition have been selected, the XRA6730B will respond with an acknowl- edge after the receipt of each subsequent eight-bit word.
Vendor:ROHMPackage Cooled:SMD
*This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operation sections of this specifica- tion is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability.
Package Cooled:SOPD/C:843
Read operations are initiated the same way as write operations with the exception that the read/write se- lect bit in the device address word is set to one. There are three read operations: current address read, ran- dom address read and sequential read.
Vendor:ROHM
The AC/ACT299 contains eight edge-triggered D-type flip- flops and the interstage logic necessary to perform syn- chronous shift left, shift right, parallel load and hold opera- tions. The type of operation is determined by S0 and S1, as shown in the Truth Table. All flip-flop outputs are brought out through 3-STATE buffers to separate I/O pins that also serve as data inputs in the parallel load mode. ...
Vendor:ROHM
The AC/ACT299 contains eight edge-triggered D-type flip- flops and the interstage logic necessary to perform syn- chronous shift left, shift right, parallel load and hold opera- tions. The type of operation is determined by S0 and S1, as shown in the Truth Table. All flip-flop outputs are brought out through 3-STATE buffers to separate I/O pins that also serve as data inputs in the parallel load mode. ...
Vendor:ROHMPackage Cooled:07+D/C:2010
Upon power up, the chipset link can be initialized via a synchronization mode with internally generated SYNC patterns, or the deserializer can be allowed to synchronize to random data. By using the synchronization mode, the deserializer establishes lock within specified, shorter time parameters.
Vendor:ROHMPackage Cooled:DIP
2. Automatic clamp control circuit. 3. Multi 3line comb filter. 4. Multi color decoder and sync processing. 5. Color system detection circuit. (Selectable auto detection and manual setting.) Result of color system dtection can be read via IIC. 6. Frequncy detection circuit for 525i/525p/625i/625p for component signal. 7. AGC circuit circuit at after stage of ADC. 8. Picture processing circuit for ...
Package Cooled:SMDD/C:99+
Vendor:N/APackage Cooled:SOP-16D/C:06+
Notes a. Room = 25_C, Full = - 40 to 85_C. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 ...
Package Cooled:02D/C:5011
Notes a. Room = 25_C, Full = - 40 to 85_C. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Typical values for dropout voltage at VOUT w 2 V are measured at VOUT = 3.3 V, while typical values for dropout voltage at VOUT < 2 V are measured at VOUT = 1.8 ...
Vendor:ROHMPackage Cooled:.D/C:20
Device logic is automatically configured to the users speci- fications using the XEPLD software. The XEPLD software is capable of optimizing and collapsing logic. The SMART- switch software/hardware feature allows implementation of buried combinatorial logic functions in the UIM, thus increasing device utilization. The XEPLD software supports third party schematic capture and HDL entry tool...
Vendor:ROHMPackage Cooled:.D/C:20
Device logic is automatically configured to the users speci- fications using the XEPLD software. The XEPLD software is capable of optimizing and collapsing logic. The SMART- switch software/hardware feature allows implementation of buried combinatorial logic functions in the UIM, thus increasing device utilization. The XEPLD software supports third party schematic capture and HDL entry tool...
Vendor:ROHMPackage Cooled:DIP
Note 3: Minimum load current is defined as the mini- mum current required at the output in order for the out- put voltage to maintain regulation. Typically the resistor divider values are selected such that this current is au- tomatically maintained.
Vendor:SONYD/C:93
The HYM71V65801 X-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes memory. The HYM71V65801 X-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
Vendor:SONYD/C:93
The HYM71V65801 X-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 64Mbytes memory. The HYM71V65801 X-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
Vendor:ROHMPackage Cooled:DIP
• Plastic package has Underwriters Laboratory Flammability Classification 94 V-0 • Metal silicon junction, majority carrier conduction • Low forward voltage drop, low power loss and high efficiency • Guardring for overvoltage protection • For use in low voltage, high frequency inverters, free wheeling, and polarity protection applications • High temperature solde...
Vendor:ROHMPackage Cooled:.D/C:6
The ?C?A/S/L and ?C?A/S?H inputs internally generate a ?C?A/S signal functioning in a similar manner to the single ?C?A/S input of other DRAMs. The key difference is each ?C?A/S input ( ?C?A/S/L and ?C?A/S?H ) controls its corresponding 8 DQ inputs during WRITE accesses. ?C?A/S/L controls DQ1 through DQ8 and ?C?A/S?H controls DQ9 through DQ16. The two ?C?A/S controls give the MT4LC1M16E5(S) both BYTE...
Vendor:ROHMPackage Cooled:.D/C:300
7.3.1 ILMI Embedded software provides an ILMI 4.0 implementation which handles address registration (switch to end device) and notification (end device to switch) as well as auto-configuration. ILMI uses SNMP over AAL-5 for transport.
Vendor:ROHMPackage Cooled:.
7.3.1 ILMI Embedded software provides an ILMI 4.0 implementation which handles address registration (switch to end device) and notification (end device to switch) as well as auto-configuration. ILMI uses SNMP over AAL-5 for transport.
Vendor:ROHMPackage Cooled:.
THE Hyundai HY57V161610D is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the main memory and graphic applications which require large memory density and high bandwidth. HY57V161610D is organized as 2banks of 524,288x16.
Vendor:ROHMPackage Cooled:.
THE Hyundai HY57V161610D is a 16,777,216-bits CMOS Synchronous DRAM, ideally suited for the main memory and graphic applications which require large memory density and high bandwidth. HY57V161610D is organized as 2banks of 524,288x16.
Vendor:EXARD/C:95
In addition to high integration, the CS8920A offers a broad range of performance features and config- urationoptions.ItsuniquePacketPage architecture automatically adapts to changing net- work traffic patterns and available system resources. The result is increased system efficien- cy and minimized CPU overhead.
Vendor:EXARPackage Cooled:DIPD/C:1992
Cases: TO-220 molded plastic Epoxy: UL 94V-0 rate flame retardant Terminals: Leads solderable per MIL-STD-202, Method 208 guaranteed Polarity: As marked High temperature soldering guaranteed: 260/10 seconds .16,(4.06mm) from case. Mounting position: Any Weight: 2.24 grams
Vendor:EXARPackage Cooled:DIPD/C:92/93
† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The voltage ...
Vendor:EXARPackage Cooled:DIPD/C:92/93
† Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The voltage ...
Vendor:BOHMPackage Cooled:SOPD/C:N/A
Vendor:XRPackage Cooled:.
This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting t...
Vendor:XRPackage Cooled:.
This is a single positive-edge-triggered D-type flip-flop. When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting t...
Vendor:ROHMPackage Cooled:DIP/32
NOTES: • Use a 0.1 µF capacitor on VDD to decouple the power source. • Physical coupling distance of the accelerometer to the microcontroller should be minimal. • Place a ground plane beneath the accelerometer to reduce noise, the ground plane should be attached to all of the open ended terminals shown in Figure 4. • Use an RC filter of 1 kΩ and 0.01 µF on th...
Vendor:N/APackage Cooled:DIPD/C:96
Vendor:ROHMPackage Cooled:DIP/32D/C:300
Controller (host) sends a start bit. Controller (host) sends the write address D2 (H) ICS clock will acknowledge Controller (host) sends a dummy command code ICS clock will acknowledge Controller (host) sends a dummy byte count ICS clock will acknowledge Controller (host) starts sending Byte 0 through Byte 20 (see Note) • ICS clock will acknowledge each byte one at a time • Controlle...
Vendor:ROHMPackage Cooled:228
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.
Vendor:EXARPackage Cooled:DIP
ActiveArray™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ EcoSPARK™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ Across the board. Around the world.™ The Power Franchise® Programmable Active Droop™
Vendor:EXARPackage Cooled:.D/C:18
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. UltraFET® is a registered trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation. SABER™ is a trademark of Analogy, Inc. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corpor...
Vendor:EXARPackage Cooled:.D/C:13
Note: There is another US / Canada contribution proposing a revisiting the above definitions and proposing removal of the part 'unless one or more ... ' in the Note under the definition 4.17 above. Also, note that the words 'extended at a fture amendment' should be changed to 'extended by a future amendment' in both the above clauses.
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:N/APackage Cooled:DIPD/C:N/A
These supplies are the analog voltage supplies for the potentiometer. The V+ supply is tied to the wiper switches while the V- supply is used to bias the switches and the internal P+ substrate of the integrated circuit. Both of these supplies set the voltage limits of the potentiometer.
Package Cooled:DIPD/C:96
Deselected, Power-down Deselected, Power-down Deselected, Power-down Deselected, Power-down Deselected, Power-down Read Cycle, Begin Burst Read Cycle, Begin Burst Write Cycle, Begin Burst Read Cycle, Begin Burst Read Cycle, Begin Burst Read Cycle, Continue Burst Read Cycle, Continue Burst Read Cycle, Continue Burst Read Cycle, Continue Burst Write Cycle, Continue Burst Write Cycle, Co...
Vendor:N/APackage Cooled:DIPD/C:N/A
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:N/APackage Cooled:DIPD/C:N/A
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:N/APackage Cooled:N/AD/C:N/A
Vendor:XRPackage Cooled:05+D/C:5000
Vendor:N/APackage Cooled:DIPD/C:N/A
Vendor:N/APackage Cooled:DIPD/C:N/A
Vendor:N/APackage Cooled:DIPD/C:N/A
Vendor:EXARPackage Cooled:1228D/C:DIP
FEATURES D BiCMOS Version of UC3846 Family D 1.4-mA Maximum Operating Current D 100-µA Maximum Startup Current D 0.5-A Peak Output Current D 125-ns Circuit Delay D Easier Parallelability D Improved Benefits of Current Mode Control
Vendor:EXARPackage Cooled:.D/C:50
Figure 3 shows the architecture of the macrocell used in the CoolRunner XRC469. The macrocell can be config- ured as either a D- or T-type flip-flop or a combinatorial logic function. A D-type flip-flop is generally more useful for implementing state machines and data buffering while a T-type flip-flop is generally more useful in implementing counters. Each of these flip-flops can be clocked from any ...
Vendor:EXARPackage Cooled:DIP-8D/C:2008+
The UPC2753GR is a frequency converter manufactured with the NESAT III process. This product consists of an RF input amplifier, Gilbert cell mixer, LO input buffer, IF amplifier with AGC, external filter port, and IF output limiting amplifier. This device was specifically designed for low cost GPS recievers, mobile radios, and PCN applications.
Vendor:EXARPackage Cooled:DIP-8D/C:2008+
The UPC2753GR is a frequency converter manufactured with the NESAT III process. This product consists of an RF input amplifier, Gilbert cell mixer, LO input buffer, IF amplifier with AGC, external filter port, and IF output limiting amplifier. This device was specifically designed for low cost GPS recievers, mobile radios, and PCN applications.
Vendor:XRPackage Cooled:.D/C:5000
The change in output voltage due to a specified change in load current. It includes the effects of self-heating. Load regulation is expressed in either microvolts per milliampere, parts-per- million per milliampere, or ohms of dc output resistance.
Vendor:EXARD/C:03+04+
If an object or material obstructs the sense pad the signal may rise enough to create a detection, preventing further operation. To prevent this, the sensor includes a timer which monitors detections. If a detection exceeds the timer setting, the timer causes the sensor to perform a full recalibration. This is known as the Max On-Duration feature.
Vendor:EXARPackage Cooled:.D/C:17
Supports continuous mode transmission and reception on all serial channels 8-Kbytes of dual-port RAM 8 serial DMA (SDMA) channels Three parallel I/O registers with open-drain capability Two baud rate generators Independent (can be connected toany SCC3/4 or SMC1) Allows changes during operation Autobaud support option Two SCCs (serial communication controllers) Ethernet/IEEE 802.3 optional o...
Vendor:EXARPackage Cooled:.D/C:17
Supports continuous mode transmission and reception on all serial channels 8-Kbytes of dual-port RAM 8 serial DMA (SDMA) channels Three parallel I/O registers with open-drain capability Two baud rate generators Independent (can be connected toany SCC3/4 or SMC1) Allows changes during operation Autobaud support option Two SCCs (serial communication controllers) Ethernet/IEEE 802.3 optional o...
Vendor:EXARPackage Cooled:.D/C:1
Three operating modes can be programmed using the SNOOZE pin. When SNOOZE is low, the device is put into snooze mode. In snooze mode, the device operates with a typical quiescent current of 2 µA while the output voltage is maintained at 3.3 V 6%. This is lower than the self-discharge current of most batteries. Load current in snooze mode is limited to 2 mA. When SNOOZE is high, the device is put in...
Vendor:EXARPackage Cooled:DIPD/C:03+
Maximum ratings are DC values beyond which the device may be damaged or have its useful life impaired. The data sheet specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. ON Semiconductor does not recommend operation outside data sheet specifications. 1. The input and output negative voltage rat...
Vendor:EXARPackage Cooled:04+D/C:5000
Maximum ratings are DC values beyond which the device may be damaged or have its useful life impaired. The data sheet specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. ON Semiconductor does not recommend operation outside data sheet specifications. 1. The input and output negative voltage rat...
Vendor:EXARPackage Cooled:DIP
B ild / Fig. 7 W1C - E inpha sen -We ch selweg schaltung / S ingle- phase inverse p arallel circuit Höchstzulä ssige r Effe ktivstrom / Maximu m ratet RMS cur rent I RMS G esamtverlustleist. der Schaltung / Total p ower d issip. of the circuit P tot P arameter: Wärmewide rstand zwischen Ge häuse und Umg ebung / the rmal re sistance case to a mbi ent R thCA
Vendor:EXARPackage Cooled:DIPD/C:100
The ADM2486 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E).
Vendor:EXARPackage Cooled:DIP
The ADM2486 differential bus transceiver is an integrated, galvanically isolated component designed for bidirectional data communication on multipoint bus transmission lines. It is designed for balanced transmission lines and complies with ANSI EIA/TIA-485-A and ISO 8482: 1987(E).
Vendor:EXARPackage Cooled:DIP18D/C:9025
E3 or DS3 Selection (Input). In Hardware Control, when the E3DS3/OC3 pin is set high, logic low on E3/DS3 pin selects a 44.736 MHz clock on C34/C44 output and logic high selects 34.368 MHz clock. When E3DS3/OC3 pin is set low, logic low on E3/DS3 pin selects 11.184 MHz clock on C34/C44 output and logic high selects 8.592 MHz clock.
Vendor:EXARPackage Cooled:DIPD/C:DIP
The W83877TF is an enhanced version from Winbond's most popular I/O chip W83877F --- which integrates the disk drive adapter, serial port (UART), IrDA 1.0 SIR, parallel port, configurable Plug- and-Play registers for the whole chip --- plus additional powerful features: ACPI / legacy power management, serial IRQ, and IRQ sharing.
Vendor:EXARPackage Cooled:DIPD/C:2005+
Note 1: Dropout is caused by either minimum control voltage (VCTRL) or minimum power voltage (VPWR). Both parameters are specified with respect to the output voltage. The specifications represent the minimum input/output voltage required to maintain 1% regulation. Note 2: The control pin current is the drive current required for the output transistor. This current will track output current with roughly a ...
Vendor:EXARPackage Cooled:.D/C:2005+
The MAX4104/MAX4105/MAX4304/MAX4305 op amps feature ultra-high speed, low noise, and low distortion in a SOT23 package. The unity-gain-stable MAX4104 requires only 20mA of supply current while delivering 625MHz bandwidth and 400V/µs slew rate. The MAX4304, compensated for gains of +2V/V or greater, delivers a 730MHz bandwidth and a 1000V/µs slew rate. The MAX4105 is compensated for a minimum gain...
Vendor:EXARPackage Cooled:.D/C:2005+
The MAX4104/MAX4105/MAX4304/MAX4305 op amps feature ultra-high speed, low noise, and low distortion in a SOT23 package. The unity-gain-stable MAX4104 requires only 20mA of supply current while delivering 625MHz bandwidth and 400V/µs slew rate. The MAX4304, compensated for gains of +2V/V or greater, delivers a 730MHz bandwidth and a 1000V/µs slew rate. The MAX4105 is compensated for a minimum gain...
Vendor:XREXARPackage Cooled:DIPD/C:8942+
Vendor:EXARPackage Cooled:.D/C:2005+
PROTECTION SECTION Peak Current Limit Current Limit Delay Time(3) Thermal Shutdown Temperature(3) Shutdown Feedback Voltage Over Voltage Protection Shutdown Delay Current Leading Edge Blanking Time TOTAL DEVICE SECTION Operating Supply Current (control part only) Start-Up Charging Current Vstr Supply Voltage