Index "Y"Vendor:TI
Vendor:TIPackage Cooled:TSSOP16D/C:00+
-15 VOUT - is a regulated -15 volt output available for exter- nal uses. Up to 25 mA is available at this pin. A 100 micro- farad capacitor should be connected as close to this pin as possible and returned to GND along with a 0.22 microfarad monolithic ceramic capacitor. CAUTION: See Voltage Regu- lator Power Dissipation
Vendor:MICPackage Cooled:2450D/C:03+
150V Power Schottky rectifier are suited for switch Mode Power Supplies on up to 24V rails and high frequency converters. Packaged in SMA and Axial, this device is intended for use in consumer and computer applications like TV, STB, PC and DVD where low drop forward voltage in required to reduce power dissipation.
Vendor:MICRELPackage Cooled:DIP
CDIM (Pin 1): Dimming Capacitor. Connect the pin to GND with a 0.022µF capacitor (nominal). The value of capaci- tance on the CDIM pin determines the dimming PWM frequency. The transfer function of capacitance to fre- quency is 5Hz/CDIM(µF).
Vendor:MICPackage Cooled:DIPD/C:2003
Nonmultiplexed address bus Processor operates at the clock input frequency On the Am186ES/ESLV microcontroller, 8-bit or 16-bit memory and I/O static bus option n Enhanced integrated peripherals provide increased functionality, while reducing system cost
Package Cooled:39D/C:MIC
Nonmultiplexed address bus Processor operates at the clock input frequency On the Am186ES/ESLV microcontroller, 8-bit or 16-bit memory and I/O static bus option n Enhanced integrated peripherals provide increased functionality, while reducing system cost
Vendor:TIPackage Cooled:TSSOP16D/C:00+
Upon receiving a start bit, 4 address bits, and the 3-bit read command (clocked into the DI pin), the DO pin of the CATY2464IPWR will come out of the high impedance state and the 16 bits of data, located at the address specified in the instructions, will be clocked out of the device. When clocking data from the device, the first bit clocked out (DO) is timed from the falling edge of the 8th clock, all...
Vendor:PHILIPSPackage Cooled:BGA
Vendor:PHILIPSPackage Cooled:BGA
Package Cooled:SOP20D/C:06+
NOTES 1Temperature range is as follows: B Version: C40C to +85C. 2Typical values are at 25C, unless otherwise stated. 3Guaranteed by design, not subject to production test. 4The digital switch contributes no propagation delay other than the RC delay of the typical R ON of the switch and the load capacitance when driven by an ideal voltage source. Since the time constant is much smaller than the rise/fal...
Vendor:TIPackage Cooled:TSSOP
4.6 USB Endpoint 0 Control and Status Register (0xC090: R/W) 4.7 USB Endpoint 1 Control and Status Register (0xC092: R/W) 4.8 USB Endpoint 2 Control and Status Register (0xC094: R/W) 4.9 USB Endpoint 3 Control and Status Register (0xC096: R/W)
Vendor:TIPackage Cooled:TSSOP
4.6 USB Endpoint 0 Control and Status Register (0xC090: R/W) 4.7 USB Endpoint 1 Control and Status Register (0xC092: R/W) 4.8 USB Endpoint 2 Control and Status Register (0xC094: R/W) 4.9 USB Endpoint 3 Control and Status Register (0xC096: R/W)
Vendor:TI
UART channel B Transmit Data or infrared encoder data. Standard transmit and receive interface is enabled when MCR[6] = 0. In this mode, the TX signal will be HIGH during reset or idle (no data). Infrared IrDA transmit and receive interface is enabled when MCR[6] = 1. In the Infrared mode, the inactive state (no data) for the Infrared encoder/decoder interface is LOW. If it is not used, leave it unconnected.
Vendor:YMCPackage Cooled:SOP8D/C:2002
This is a dual purpose pin. During Master Reset, a HIGH on BE will select Big-Endian operation. In this case, depending on the bus size, the most significant byte or word written to Port A is read from Port B first. A LOW on BE will select Little-Endian operation. In this case, the least significant byte or word written to Port A is read from Port B first. After Master Reset, this pin selects the timing mod...
Vendor:TIPackage Cooled:TSSOP16D/C:00+
structed as a multi-chip hybrid device. Actuation control is via an Infrared LED. The output switch is a combination of a photodiode array with MOSFET switches and control circuity. The relays can be con- figured for AC/DC or DC only operation.
Vendor:TIPackage Cooled:TSSOP16D/C:00+
structed as a multi-chip hybrid device. Actuation control is via an Infrared LED. The output switch is a combination of a photodiode array with MOSFET switches and control circuity. The relays can be con- figured for AC/DC or DC only operation.
Vendor:TI
The Y2732-1 and Y2732-2 are dual high-side switches with active-high and active-low enable inputs, respec- tively. Fault conditions turn off or inhibit turn-on one or both of the output transistors, depending upon the type of fault, and activate the open-drain error flag transistors to pull FLG pin to ground.
Vendor:NECPackage Cooled:600D/C:9624
1.1 Scope. This specification covers the performance requirements for NPN silicon switching transistors. Four levels of product assurance are provided for each encapsulated device type as specified in MIL-PRF-19500 and two levels of product assurance are provided for each unencapsulated device type as specified in MIL-PRF-19500.
• Internal VCO adjustment free circuit eliminating need for VCO coil adjustments. • Internal sound carrier BPF and sound carrier trap enable easy configuration of PAL sound multi-system at low cost. • Considerably reduces the number of required peripheral parts. • Use of digital AFT eliminates problem of AFT tolerance. • Package: SSOP30 (275 mil)
Vendor:YD/C:06+
s Intended for Radio Frequency (RF) front end applications in the GHz range, such as: x analog and digital cellular telephones x cordless telephones (Cordless Telephone (CT), Personal Communication Network (PCN), Digital Enhanced Cordless Telecommunications (DECT), etc.) x radar detectors x pagers x Satellite Antenna TeleVision (SATV) tuners
Vendor:YD/C:06+
s Intended for Radio Frequency (RF) front end applications in the GHz range, such as: x analog and digital cellular telephones x cordless telephones (Cordless Telephone (CT), Personal Communication Network (PCN), Digital Enhanced Cordless Telecommunications (DECT), etc.) x radar detectors x pagers x Satellite Antenna TeleVision (SATV) tuners
Package Cooled:4000
The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have any questions, please contact the SAMSUNG branch office near you.
Vendor:TIPackage Cooled:TSSOP24D/C:00+
No license is granted, implied or otherwise, under any patent or patent rights of VIA Technologies. VIA Technologies makes no warranties, implied or otherwise, in regard to this document and to the products described in this document. The information provided by this document is believed to be accurate and reliable to the publication date of this document. However, VIA Technologies assumes no responsibility ...
Vendor:TIPackage Cooled:SSOPD/C:99+
MBF2 is set LOW by a LOW-to-HIGH transition of CLKB that writes data to the mail2 register. Writes to the mail2 register are inhibited while MBF2 is LOW. MBF2 is set HIGH by a LOW-to- HIGH transition of CLKA when a Port A read is selected and MBA is HIGH. MBF2 is set HIGH following either a Reset (RS2) or Partial Reset (PRS).
Vendor:TIPackage Cooled:TID/C:04+
The QS32X2245 provides a set of 16 high-speed CMOS TTL-compatible bus switches in a flow-through pinout. The QS32X2245 includes internal 25Ω resistors to reduce reflection noise in high speed applications. The Output Enable (OEn) signals turn the switches on similar to the OEn signal of the 74'245. QuickSwitch devices provide an order of magnitude faster speed than conventional logic devices. The ...
Vendor:TID/C:01+
The source and load impedances presented to the MAX2601/MAX2602 have a direct impact upon its gain, output power, and linearity. Proper source- and load- terminating impedances (ZS and ZL) presented to the power transistor base and collector will ensure optimum performance.
Vendor:TIPackage Cooled:TSOP14D/C:01+
For safety, the bq24400 inhibits fast charge until the battery voltage and temperature are within user-defined limits. If the battery voltage is below t he l o w - v o l t a g e t h r es ho l d , t h e bq24400 uses trickle-charge to condition the battery. For NiMH batteries, the bq24400 provides an optional top-off charge to maximize the battery capacity.
Vendor:BIPackage Cooled:DIPD/C:01
OUTPUT VOLTAGE LIMITERS Default Limit Voltage Minimum Limiter Separation (VH C VL) Maximum Limit Voltage Limiter Input Bias Current Magnitude(5) Maximum Minimum Average Drift Limiter Input Impedance Limiter Feedthrough(6) DC Performance in Limit Mode Limiter Offset Voltage Op Amp Input Bias Current Shift(3)
Vendor:MOSEPackage Cooled:DIPD/C:92
The BS616LV4018 is a high performance, very low power CMOS Static Random Access Memory organized as 262,144 words by 16 bits and operates from a range of 4.5V to 5.5V supply voltage. Advanced CMOS technology and circuit techniques provide both high speed and low power features with a typical CMOS standby current of 2.0uA at 5.0V/25oC and maximum access time of 55ns at 5.0V/85oC. Easy memory expansion is prov...
Vendor:KYOCERAD/C:0236
The g-cell plates form two back-to-back capacitors (Figure 3). As the center plate moves with acceleration, the distance between the plates changes and each capacitor's value will change, (C = A/D). Where A is the area of the plate, å is the dielectric constant, and D is the distance between the plates.
Vendor:YAMAHAPackage Cooled:DIP-8D/C:03+
Case: SOT-26, Molded Plastic Case material - UL Flammability Rating 94V-0 Moisture sensitivity: Level 1 per J-STD-020A Terminals: Solderable per MIL-STD-202, Method 208 Terminal Connections: See Diagram Marking: Date Code and Marking Code (See Diagrams & Page 3) Weight: 0.015 grams (approx.) Ordering Information (See Page 3)
Vendor:YAMAHAPackage Cooled:DIP-8D/C:03+
Case: SOT-26, Molded Plastic Case material - UL Flammability Rating 94V-0 Moisture sensitivity: Level 1 per J-STD-020A Terminals: Solderable per MIL-STD-202, Method 208 Terminal Connections: See Diagram Marking: Date Code and Marking Code (See Diagrams & Page 3) Weight: 0.015 grams (approx.) Ordering Information (See Page 3)
Package Cooled:SOPD/C:SOP
Note 1: Current into a pin is defined as positive. Current out of a pin is defined as negative. All voltages are referenced to ground except VTH , VTL, and VID. Note 2: Short only one output at a time. Do not exceed the absolute maximum junction temperature specification. Note 3: AC parameters are guaranteed by design and characterization. Note 4: CL includes scope probe and test jig capacitance. Note 5: t...
Vendor:YAMAHAPackage Cooled:SOPD/C:94+
Packaging Codes - Options (Antistatic): SML4728 - SML4737A: 11T - 1.8 k per 7" plastic reel (12mm tape), 36 k/car- ton 5AT - 7.5 k per 13" plastic reel (12mm tape), 75 k/car- ton SML4738 - SML4764A: 61 - 1.8 k per 7" plastic reel (12mm tape), 36 k/carton 5A - 7.5 k per 13" plastic reel (12mm tape), 75 k/car- ton
Package Cooled:SOP16M
C 2.7 (VCC = 2.7V to 5.5V) C 1.8 (VCC = 1.8V to 5.5V) Internally Organized 128 x 8 (1K), 256 x 8 (2K), 512 x 8 (4K), 1024 x 8 (8K) or 2048 x 8 (16K) Two-wire Serial Interface Schmitt Trigger, Filtered Inputs for Noise Suppression Bidirectional Data Transfer Protocol 100 kHz (1.8V) and 400 kHz (2.7V, 5V) Compatibility Write Protect Pin for Hardware Data Protection 8-byte Page (1K, 2K), 16-byte Page (4K, 8...
Vendor:YMPackage Cooled:SMDD/C:05+
After a successful ATR, the Protocol and Parameter Selection (PPS) protocol, as defined by ISO 7816-3, may be used to negotiate the communications speed with CryptoMemory devices 32 Kbits and larger. CryptoMemory supports D values of 1, 2, 4, 8, 12, and 16 for an F value of 372. Also supported are D values of 8 and 16 for F = 512. This allows selec- tion of 8 communications speeds ranging from 9600 baud to...
Vendor:SANKOSHA
Package Cooled:BGAD/C:07+
Minimizes Distortion and Error Voltages RON Matching Between Channels, 0.4 Ω typ On-Resistance Flatness, 2Ω typ Low Charge Injection. Q=4pC typ. Reduces Step errors, clicking, popping noise High Speed. tON, 10ns typ Very Low Crosstalk: -72dB @ 30 MHz Wide -3dB Bandwidth: >200 MHz High-Current Channel Capability: >100mA TTL/CMOS Logic Compatible Low Power Consumption (0.5µW typ) Pi...
Vendor:N/APackage Cooled:1503
This is the active high output drive signal for the (first) phase A winding. Normally, this output would be the first to be energized when starting a stepping sequence, and is always the first state entered into internally on powerup. After powerup, however, the ELM312 treats this pin specially, maintaining it at a low level until the first step command is received. This in effect keeps the motor of...
Package Cooled:600D/C:2000
Flyback and Synchronous Rectifier Apps Provides Complementary Auxiliary Driver with Programmable Deadtime (Turn-On Delay) between AUX and MAIN Switches Peak Current-Mode Control with 0.5-V Cycle-by-Cycle Current Limiting Hiccup Mode 0.75-V Current Limit TrueDrivet 2-A Sink, 2-A Source Outputs 110-V Input Startup Device Trimmed Internal Bandgap Reference for Accurate Line UV and Line OV Threshold Programm...
Vendor:NECPackage Cooled:SOICD/C:08+
Flyback and Synchronous Rectifier Apps Provides Complementary Auxiliary Driver with Programmable Deadtime (Turn-On Delay) between AUX and MAIN Switches Peak Current-Mode Control with 0.5-V Cycle-by-Cycle Current Limiting Hiccup Mode 0.75-V Current Limit TrueDrivet 2-A Sink, 2-A Source Outputs 110-V Input Startup Device Trimmed Internal Bandgap Reference for Accurate Line UV and Line OV Threshold Programm...
Package Cooled:2644D/C:2000
Vendor:FAIRCHILDPackage Cooled:SSOP-16D/C:04+
Vendor:FAIRCHILDPackage Cooled:SSOP-16D/C:04+
Vendor:.Package Cooled:SMDD/C:92
The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used and by PCB layout. The typical required capacitor value is 1 to 4 pF.
Package Cooled:600D/C:99+
RECALL COMMAND The recall command will retrieve data from the selected nonvolatile register and write it into the data register of the associated DAC. This operation is initiated by taking CS LOW and clocking in a start bit followed by the recall command and the address of the nonvolatile register to be recalled. The eight bits of data are dont care, so CS can be taken high any time after the address ...
Vendor:YAMAHAPackage Cooled:08+D/C:04+
Hynix HYMP512S64MP8 series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
Package Cooled:08+D/C:12000
Hynix HYMP512S64MP8 series incorporates SPD(serial presence detect). Serial presence detect function is implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
Vendor:2D/C:07+/08+
NOTES:2911 tbl 04 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reli...
Vendor:MAXIMPackage Cooled:TSSOP
Package Cooled:SOT-A
Package Cooled:SOT-A
Vendor:PHILIPS
The voltage-controlled oscillator (VCO) receives the filtered error signal from the Loop Filter and based on the voltage of the error signal generates a primary frequency. The VCO output is connected to the "Frequency Dividers and Clock Drivers" block that divides VCO frequency and buffer generated clocks.
Vendor:KOAPackage Cooled:4x4-47KD/C:08+
The 33996 directly interfaces with microcontrollers and is compatible with both 3.3 V and 5.0 V CMOS logic levels. The 33996, in effect, serves as a bus expander and buffer with fault management features that reduce the MCUs fault management burden.
Package Cooled:DIP-4
TTL/CMOS input enable pin. Used to control the LOUT0-LOUT2 outputs and acts as a frequency select pin. LEN, DSEL, and LSEL are used together to decode the selection and post divide of the LVDS output bank, see the LVDS Output Post- Divider and Frequency Select Table for proper decoding. Internal 25kΩ pull-up. When disabled, LOUT0-LOUT2 outputs are LOW, and the complimentary outputs are HIGH. The thresh...
Vendor:COSMOPackage Cooled:SMD-4D/C:04+
1. CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD VCC2 fi + (CL VCC2 fo) where: fi = input frequency in MHz fo = output frequency in MHz (CL VCC2 fo) = sum of outputs CL = output load capacitance in pF VCC = supply voltage in V
Vendor:FAIRCHILDPackage Cooled:N/AD/C:04+
HY57V28420B(L)T is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Vendor:n/aD/C:06+
HY57V28420B(L)T is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Vendor:n/aPackage Cooled:TSSOPD/C:06+
12-bit resolution 5MHz minimum sampling rate Functionally complete Small 24-pin DDIP Requires only 5V supplies Low-power, 1.3 Watts Outstanding dynamic performance No missing codes over full military temperature range Edge-triggered, no pipeline delay Ideal for both time and frequency-domain applications
Vendor:FAIRCHILDD/C:04+
Line sensitive electronics cause an instantaneous transfer to battery power if utility power is lost, or a brownout condition is detected. When line voltage is present and stabilized, the transfer circuitry switches back to normal operation and begins recharging the battery. The transfer circuitry can be tested via a momentary test switch located on the housing.
Vendor:n/aD/C:06+
Line sensitive electronics cause an instantaneous transfer to battery power if utility power is lost, or a brownout condition is detected. When line voltage is present and stabilized, the transfer circuitry switches back to normal operation and begins recharging the battery. The transfer circuitry can be tested via a momentary test switch located on the housing.
Vendor:n/aD/C:06+
and commerce. With Internet security playing an important role in the delivery of digital media such as books or music, traditional software methods are quickly becoming unreliable. The MaverickKey unique IDs provide OEMs with a method of utilizing specific hardware IDs such as those assigned for SDMI (Secure Digital Music Initiative) or any other authentication mechanism.
Vendor:n/aD/C:06+
and commerce. With Internet security playing an important role in the delivery of digital media such as books or music, traditional software methods are quickly becoming unreliable. The MaverickKey unique IDs provide OEMs with a method of utilizing specific hardware IDs such as those assigned for SDMI (Secure Digital Music Initiative) or any other authentication mechanism.
Vendor:FAIRCHILDPackage Cooled:TSSOP-8D/C:06+
Vendor:FAIPackage Cooled:SOP8D/C:07/08+
Vendor:PHILIPSPackage Cooled:BGA
Vendor:FAIRCHILDPackage Cooled:TSSOP
Vendor:WALSINPackage Cooled:601D/C:0601
BOOT BLOCK PROGRAMMING LOCKOUT: The device has one designated block that has a programming lockout feature. This feature prevents programming of data in the designated block once the feature has been enabled. The size of the block is 16K bytes. This block, referred to as the boot block, can contain secure code that is used to bring up the system. Enabling the lockout feature will allow the boot
Message and streaming status modes Raw cell mode (52 octet) 200 Mbps half duplex 155 Mbps full duplex (with 2-cell PDUs) Distributed host or SAR-shared memory reassembly 8 programmable reassembly hardware time-outs (assignable per VCC) Global max PDU length for AAL5 Per-VCC buffer firewall (memory usage limit) Simultaneous reassembly and segmentation Idle cell filtering
Vendor:EVERLIGHTPackage Cooled:N/AD/C:2460
Vendor:TIPackage Cooled:SOP8D/C:06+
• IEEE 802.3u D5 repeater and management compatible • Support 7 TX/FX ports and 1 universal port (TX or MII port selectable) • Support 8-scale utilization and collision rate LED display • Asynchronous Expansion port clock supported for easily stackable application • Separate jabber and partition state machines for each port
Vendor:SSOP-8PPackage Cooled:SSOP-8PD/C:04+
Applications • DC-DC converters • Synchronous rectification • Battery chargers • Switched-mode and resonant-mode power supplies • DC choppers • AC motor control • Temperature and lighting controls • Low voltage relays
Vendor:SSOP-8PD/C:04+
Applications • DC-DC converters • Synchronous rectification • Battery chargers • Switched-mode and resonant-mode power supplies • DC choppers • AC motor control • Temperature and lighting controls • Low voltage relays
Vendor:SSOP-8PD/C:04+
The coupler consists of a AlGaAs LED that is optically cou- pled to a dielectrically isolated photodiode array which drives two series connected high voltage MOS transistors. The typical ON-Resistance is 37 Ω at 25 mA and is linear up to 50 mA. There is built-in current limiting circuitry in the detector chip, enabling it to pass FCC 68-302 and other regulatory voltage surge requirements when over volta...
Package Cooled:SSOP-8PD/C:04+
Calibration can minimize these errors. The gain calibration cannot have a REF IN+ of more than AVDD −1.5V with Buffer ON. To calibrate gain, turn Buffer OFF. (3) ∆VOUT is change in digital result. (4) 9pF switched capacitor at fSAMP clock frequency (see Figure 13). (5) The input impedance for PGA = 128 is the same as that for PGA = 64 (that is, 7MΩ/64).
Vendor:SSOP-8PD/C:04+
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Vendor:SSOP-8PD/C:04+
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Package Cooled:08+D/C:4500
Package Cooled:08+D/C:4500
Package Cooled:QFN6
Package Cooled:SOP8
FUNCTION Input pin for oscillator. It can be connected to crystal, or can connect a resistor to VDD to generate main system clock. Oscillator can be stopped when SCR.1 is set to logic 1. Output pin for oscillator which is connected to another crystal pin. 32.768 KHz crystal input pin. 32.768 KHz crystal output pin. General Input/Output port specified by PM1 register. If output mode is selected, PM0 registe...