Z8F08A28100KIT

Vendor:ZILOGD/C:1

A differential analog voltage input allows increased common-mode rejection and offset of the zero-input analog voltage value. Although a reference input (REF/2) is available to allow 8-bit conversion over smaller analog voltage spans or to make use of an external reference, ratiometric conversion is possible with the REF/2 input open. Without an external reference, the conversion takes place over a span f...

Z8F1621AN020SG

Vendor:ZILOGD/C:08+

Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current  Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt ƒ Operating Junction and Storage Temperature Range Soldering Temperature, for 10 second Mounting torqe, 6-32 or M3 screw

Z8F1621PM020SG

Small Size Industry Standard Footprint Compatible with IR Solder Diffused Optics Operating Temperature Range of -30C to +85C • Right Angle Package Available • Five Colors Available • Available in 8 mm Tape on 7 in. (178 mm) Diameter Reels

Z8F1680QN020SG

Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.88mH, IAS = 32A, VDD = 50V, RG = 25 Ω, Starting TJ = 25C 3. ISD 32A, di/dt 300A/µs, VDD BVDSS, Starting TJ = 25C 4. Pulse Test : Pulse width 300µs, Duty cycle 2% 5. Essentially independent of operating temperature

Z8F1680SJ020SG

The CY29946 is a low-voltage 200-MHz clock distribution buffer with the capability to select one of two LVCMOS/LVTTL compatible input clocks. These clock sources can be used to provide for test clocks as well as the primary system clocks. All other control inputs are LVCMOS/LVTTL compatible. The 10 outputs are LVCMOS or LVTTL compatible and can drive 50Ω series or parallel terminated transmission lines....

Z8F2401AN020SC

Industry Wide LH0002 Replacement High Input Impedance-180KΩ Min Low Output Impedance-10Ω Max Low Harmonic Distortion DC to 30 MHz Bandwidth Slew Rate is Typically 400 V/µS Operating Range from5V to 20V Available to DSCC SMD5962-7801301XC

Z8F2401AN020SC

Industry Wide LH0002 Replacement High Input Impedance-180KΩ Min Low Output Impedance-10Ω Max Low Harmonic Distortion DC to 30 MHz Bandwidth Slew Rate is Typically 400 V/µS Operating Range from5V to 20V Available to DSCC SMD5962-7801301XC

Z8F3202AR020SC

Vendor:ZILOGPackage Cooled:QFPD/C:06+

True 64-bit microprocessor C 64-bit integer operations C 64-bit floating-point operations C 64-bit registers C 64-bit virtual address space xHigh-performance microprocessor C 260 Dhrystone MIPS at 200MHz C 100 peak MFLOP/s at 200MHz C Two-way set associative caches C Simple 5-stage pipeline xHigh level of integration C 64-bit, 200 MHz integer CPU C 64-bit floating-point unit C 16KB instru...

Z8F3202AR020SC

Vendor:ZILOGPackage Cooled:QFPD/C:05+

True 64-bit microprocessor C 64-bit integer operations C 64-bit floating-point operations C 64-bit registers C 64-bit virtual address space xHigh-performance microprocessor C 260 Dhrystone MIPS at 200MHz C 100 peak MFLOP/s at 200MHz C Two-way set associative caches C Simple 5-stage pipeline xHigh level of integration C 64-bit, 200 MHz integer CPU C 64-bit floating-point unit C 16KB instru...

Z8F3202VS020SC

Z8F3221AN020SG

Positive Terminator Channel Pins. Provide positive signal line termination in LVD operation, and are connected to GND through low impedance in S/E operation. In HPD, DISABLE, or Power Off condition these pins present high impedance to the SCSI Bus.

Z8F3222AR020SC

Vendor:ZILOGPackage Cooled:QFPD/C:06+

ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.

Z8F3222VS020SC

The IRU1015 keeps a constant 1.25V between the out- put pin and the adjust pin. By placing a resistor R1 across these two pins a constant current flows through R1, add- ing to the IADJ current and into the R2 resistor producing a voltage equal to the (1.25/R1)3R2 + IADJ3R2 which will be added to the 1.25V to set the output voltage. This is summarized in the above equation. Since the mini- mum load current re...

Z8F4822AR020SC

Vendor:availPackage Cooled:ZILOGD/C:06+

The M54/74HC4075 is a high speed CMOS TRIPLE 3-INPUT OR GATE fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. The internal circuit is composed of 4 stages including buffered output, which gives high noise immunity and a stable output.

Z8F6421AN020EC

Z8F6421AN020EG

Package Cooled:DIP/SMD

Analog functions and audio gating have also been integrated into the ISD5116 product to allow easy interface with integrated digital cellular chip sets on the market. Audio paths have been designed to enable full duplex conversation record, voice memo, answering machine (including outgoing message playback) and call screening features. This product enables playback of messages while the phone is in standby,...

Z8F6422VS020SC

Vendor:ZILPackage Cooled:PLCCD/C:0431+

PLL bandwidth is affected by loop filter component values, Mfec and Mfin values, and the PLL Loop Constants listed in AC Characteristics on pg. 8. The various Non-FEC ratio settings can be used to actively change PLL loop bandwidth in a given application. See FEC PLL Ratio Dividers Look-up Table (LUT) on pg. 3. PLL Simulator Tool Available A free PC software utility is available on the ICS website ...

Z8F6423FT020SG

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Z8FMC08100AKSG

The Intersil ISL83699 device is a low ON-resistance, low voltage, bidirectional, Quad SPDT (Dual DPDT) analog switch designed to operate from a single +1.65V to +3.6V supply. Targeted applications include battery powered equipment that benefit from low on-resistance (0.26Ω), and fast switching speeds (tON = 10ns, tOFF = 7ns). The digital logic input is 1.8V logic-compatible when using a single +...

Z8FMC16100AKEG

Vendor:availD/C:06+

1. TOLERANCE AND TYPE NUMBER DESIGNATION The JEDEC type numbers shown indicate a tolerance of 5%. 2. ZENER VOLTAGE (VZ) and IMPEDANCE (IZT and IZK) Test conditions for zener voltage and impedance are as follows: IZ is applied 40 10 ms prior to reading. Mounting contacts are located 3/8 to 1/2 from the inside edge of mounting clips to the body of the diode (TA = 25C +8C, −2C). 3. SURGE CURRENT (IR...

Z8FMC16100AKSG

Vendor:availPackage Cooled:ZILOGD/C:06+

Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive.

Z8FMC16100QKSG

Vendor:ZILOGPackage Cooled:ZILOGD/C:490

Z8L18020PSC

Vendor:ZIOLGPackage Cooled:DIP

POWER-ON INITIALIZATION When power is first applied, power-on reset circuitry initial- izes the COMBO II and puts it into the power-down state. The gain control registers for the transmit and receive gain sections are programmed to OFF (00000000), the hybrid balance circuit is turned off, the power amp is disabled and the device is in the non-delayed timing mode. The Latch Di- rection Register (LDR) i...

Z8L18220AEC

Vendor:ZILOGPackage Cooled:QFPD/C:08+

This document is a general product description and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev 02 / Apr. 2001Hynix Semiconductor

Z8L18220ASC

Vendor:ZILOGPackage Cooled:TQFP101D/C:08+

NOTES: 1. Designators in TYPE: P: power supply and ground, DI: digital input, DO: digital output, AI: analog input, AO: analog output 2. Must be connected to ground with a bypass capacitor. The recommended value is 0.1 µF to 0.22 µF, however it depends on the application environment. Refer to the optical black level clamp loop section for details. 3. Must be connected to ground with a bypas...

Z8L18220FSC

Vendor:ZILOGPackage Cooled:QFPD/C:01+

If the port is left in bilingual (Bi) mode, then the TPB+ and TPBC terminals may be left unconnected or the TPB+ and TPBC terminals can be connected to the suggested normal termination network. The TPA+ and TPAC terminals of an unused port can be left unconnected. The TPBIAS#_SD# terminal can be left unconnected.

Z8L38210ASC

Vendor:ZILOGPackage Cooled:400D/C:01+

Interrupt Request (Open Drain Output): an output indicating an unmasked HDLC interrupt. The interrupt remains active until the microprocessor clears it by reading the HDLC Interrupt Status Register. This interrupt source is enabled with B2=0 of Master Control Register. New Data Available (Open Drain Output): an active low output signal indicating availability of new data from the S-Bus. This signal is sele...

Z8L38210FSC

Vendor:ZILOGD/C:08+

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.

Z-8-MCU (LH080117)

Z8PE002SZ010SC

Vendor:ZILOGPackage Cooled:N/AD/C:00+

These versatile devices are useful for driving a wide range of loads including solenoids, relays DC mo- tors, LED displays filament lamps, thermal print- heads and high power buffers. The ULQ2001A/2002A/2003A and 2004A are sup- plied in 16 pin plastic DIP packages with a copper leadframe to reduce thermal resistance. They are available also in small outline package (SO-16) as ULQ2001D1/2002D1/2003D1...

Z8PE002SZ010SG

The 82091AA Advanced Integrated Peripheral (AIP) is an integrated I O solution containing a floppy disk controller 2 serial ports a multi-function parallel port an IDE interface and a game port on a single chip The integration of these I O devices results in a minimization of form factor cost and power consumption The

Z8PE003HZ010EC

Vendor:ZILOGPackage Cooled:SSOP-20D/C:2008+

The basic unit of logic on the ispLSI 2032VE device is the Generic Logic Block (GLB). The GLBs are labeled A0, A1 .. A7 (see Figure 1). There are a total of eight GLBs in the ispLSI 2032VE device. Each GLB is made up of four macrocells. Each GLB has 18 inputs, a programmable AND/OR/Exclusive OR array, and four outputs which can be configured to be either combinatorial or registered. Inputs to the GLB...

Z8PE003PZ010EG

Vendor:ZILOGPackage Cooled:DIP16D/C:0720/33

5 each NBB-300, NBB-310 and NBB-400 Ceramic Micro-X Amplifiers 5 each NLB-300, NLB-310 and NLB-400 Plastic Micro-X Amplifiers 2 Broadband Evaluation Boards and High Frequency SMA Connectors Broadband Bias Instructions and Specification Summary Index for ease of operation

Z8PE003PZ010SC

Vendor:ZiLOGPackage Cooled:SOP8D/C:0313+0308+0251+

n SDTV/HDTV serial digital video standard compliant n Supports 270 Mbps, 360 Mbps, 540 Mbps, 1.483 Gbps and 1.485 Gbps serial video data rates with auto-detection n LSB de-dithering option n Uses low-cost 27MHz crystal or clock oscillator reference n Fast VCO lock time: < 500 µs at 1.485 Gbps n Built-in self-test (BIST) and video test pattern generator (TPG)* n Automatic EDH/CRC word ...

Z8PE003SZ010SC

Vendor:ZILOGPackage Cooled:SMD18D/C:00+

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the SSM2275/SSM2475 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to av...

Z8S18010FEG

The microphone input is a switchable interface for two differential microphone inputs. The first stage is a low noise differential amplifier that provides a selectable gain of C2.62 dB or 5.38 dB, which is routed to output pins MICOUTP and MICOUTN. The second stage amplifier gain is set externally. The first and second stages may be tied directly together with a specified gain or an external filter may be...

Z8S18010FSC

Vendor:ZILOG

Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. ∆RÏÍ = ∆RÏÍ max - ∆RÏÍ min 5. Flatness is defined as the difference between the maximum and...

Z8S18010PSC

Vendor:ZILOGPackage Cooled:600D/C:01+

Transformerless 2W to 4W conversion Controls battery feed to line Programmable line impedance Programmable network balance impedance Off-hook and dial pulse detection Protects against GND short circuit Programmable gain Programmable constant current mode with constant voltage fold over Transformerless balanced ringing with automatic ring trip circuit. No mechanical relay Supports low voltage ringing Lin...

Z8S18010VEC-Z180MPU

Vendor:ZiLOGPackage Cooled:SOP8D/C:0210+0208+

The analog-to-digital converter (ADC) utilizes a fully differential and pipelined architecture. This ADC is well suited for low voltage operation, low power consumption requirement, and high-speed applications. It assures 10-bit resolution of the output data with no missing code. The VSP2232 includes the reference voltage generator for the ADC. REFP (positive reference, pin 38), REFN (negative reference, ...

Z8S18010VEG

The Z8S18010VEG and Z8S18010VEG are dual 4-channel analog multiplexers or demultiplexers with common select logic. Each multiplexer has four independent inputs/outputs (pins nY0 to nY3) and a common input/output (pin nZ). The common channel select logics include two digital select inputs (pins S0 and S1) and an active LOW enable input (pin E). When pin E = LOW, one of the four switches is selected (l...

Z8S18010VSC

Vendor:ZILOGPackage Cooled:PLCC68D/C:N/A

Parameter Carrier Frequency Operating Voltage (VDD_MEM) Operating Voltage (VDD_PIO) RF Output Power RX Sensitivity Load Impedance Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage Average Current Consumption

Z8S18012VSC

Vendor:ZILOGD/C:08+

Z8S18016FSC

1. VIH (max) = 3.0V AC.The overshoot voltage duration is 3ns. 2. VIL (min) = -2.0V AC. The undershoot voltage duration is 3ns. 3. Any input 0V VIN VDDQ. Input leakage currents include Hi-Z output leakage for all bi-directional buffers with tri-state outputs. 4. Dout is disabled, 0V VOUT VDDQ.

Z8S18020

Vendor:ZILOGD/C:04+

Z8S18020

D/C:08+/09+

Z8S18020FSC

internal pullCup is provided on LSS allowing the device to operate in OCC3 mode if LSS is not used. Nibble / Byte Select (NBB) C In OCC3 mode, selects between 4Cbit (Nibble) and 8Cbit (Byte) parallel data input format. LOW = Byte, HIGH = Nibble. An internal pullCup is provided on NBB allowing the device to operate in Nibble mode if NBB is not used. External Clock Select (ECSN) C Allows external ...

Z8S18020PSC

Vendor:ZILOGPackage Cooled:01+D/C:DIP-64

Note: (1) The minimum DC input voltage is C0.5V. During transitions, inputs may undershoot to C2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns. (2) Output shorted for no more than one second. No more than one output shorted at a time.

Z8S18020VEC-Z180MPU

Vendor:ZiLOGPackage Cooled:SOP8D/C:0209+0211

A block erase operation erases one of the devices 32k-word blocks typically within 0.39s (5V VDD, 12V VPP), 4k-word blocks typically within 0.25s (5V VDD, 12V VPP) independent of other blocks. Each block can be independently erased 100,000 times. Block erase suspend mode allows system software to suspend block erase to read or write data from any other block.

Z8S18020VSC SL1960

Vendor:ZilogD/C:1999+

Z8S1802DFSG

This supplemental information applies to the GS816118/36T datasheet, which you will find attached to this document. This supplement includes a new package offering (the 165-bump BGAPackage D), as well as an additional organization (x32, which is only offered in the 165 BGA for this part).

Z8S1802VSC

Vendor:ZilogPackage Cooled:PLCC-68D/C:2004+

Z8S18033FEC

Vendor:ZILOGPackage Cooled:QFPD/C:01+

Note 8: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design.

Z8S18033FSC

Vendor:.Package Cooled:QFPD/C:.

This pin is active only when the chip transmits tone dialing signals. Otherwise, it al- ways outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor (to VSS) should not be less than 5kW and any DC load connected to VDD is not allowed.

Z8S18033FSG

Vendor:N/APackage Cooled:N/AD/C:08+09+

AMDs Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.

Z8S18033SCF

Z8S18033VEG

Only few external Components required Input Undervoltage Lockout 67kHz/100kHz fixed Switching Frequency Max Duty Cycle 72% Low Power Standby Mode to support Blue Angle Norm Latched Thermal Shut Down Overload and Open Loop Protection Overvoltage Protection during Auto Restart Adjustable Peak Current Limitation via External Resistor Overall Tolerance of Current Limiting < 5% Internal Leading...

Z8S18033VSC(Z180MPU)

3-A Low-Dropout Voltage Regulator Available in 1.5-V, 1.8-V, 2.5-V, and 3.3-V Fixed-Output and Adjustable Versions Dropout Voltage Typically 150 mV at 3 A (TPS75833) Low 125 µA Typical Quiescent Current Fast Transient Response 3% Tolerance Over Specified Conditions for Fixed-Output Versions Available in 5-Pin TO-220 and TO-263 Surface-Mount Packages Thermal Shutdown Protection

Z8S1833VSC

Package Cooled:PLCC

Z8SCICER

D/C:03+

The MAX2374 silicon-germanium (SiGe), switchable- gain, variable-linearity, low-noise amplifier (LNA) is designed for cellular-band, code-division multiple- access (CDMA). It can be used for applications such as TDMA and PDC or wherever high dynamic range and low noise are required. This LNA provides a high intermodulation intercept point (IIP3), which is adjustable to meet specific system requirements by s...

Z8SCICER

Vendor:19D/C:06+

The MAX2374 silicon-germanium (SiGe), switchable- gain, variable-linearity, low-noise amplifier (LNA) is designed for cellular-band, code-division multiple- access (CDMA). It can be used for applications such as TDMA and PDC or wherever high dynamic range and low noise are required. This LNA provides a high intermodulation intercept point (IIP3), which is adjustable to meet specific system requirements by s...

Z8SCICER18F5

Vendor:ZIOLGPackage Cooled:QFP

Figure 1 and Table 2 show the maximum board dimensions for boards designed to interface to the HCE connectors. Surface mount components should be used to keep the total height of the HCE board and connectors to 0.6875 inches (17.46 mm) to avoid interference with the optional ETAS ETK interface.

Z8SCJCER

Vendor:ZILOGPackage Cooled:QFPD/C:08+

In no event shall ELAN Microelectronics be made responsible for any claims attributed to errors, omissions, or other inaccuracies in the information or material contained in this specification. ELAN Microelectronics shall not be liable for direct, indirect, special incidental, or consequential damages arising from the use of such information or material.

Z8SCJCER

Vendor:ZILOGPackage Cooled:QFP

In no event shall ELAN Microelectronics be made responsible for any claims attributed to errors, omissions, or other inaccuracies in the information or material contained in this specification. ELAN Microelectronics shall not be liable for direct, indirect, special incidental, or consequential damages arising from the use of such information or material.

Z90104-3114

Vendor:ZIOLGPackage Cooled:DIPD/C:99

RF Output. AC coupled output stage internally matched to 50 Ohms. Route as coplanar waveguide using adjacent ground pins. A shunt inductive matching element included inside the PA after the AC coupling capacitor provides a DC path to ground at this pin.

Z9020306PSC

D/C:01+

NOTES: 1. Minimums are guaranteed but not production tested. 2. This parameter is guaranteed but not production tested. 3. The bus switch contributes no propagation delay other than the RC delay of the ON resistance of the switch and the load capacitance. The time constant for the switch alone is of the order of 1.25ns for CL = 50pF. Since this time constant is much smaller than the rise and fall times o...

Z9023306PSC-4492

Vendor:ZILOGPackage Cooled:DIP-42D/C:99+

Features: • Supports Spread Spectrum modulation for CPU and PCI clocks, default -0.4 downspread. • Efficient Power management scheme through stop clocks and power down modes. • Uses external 14.318MHz crystal, no external load cap required for CL=18pF crystal. • 28-pin TSSOP package, 4.40mm (173mil).

Z9023306PSC-4492

Vendor:ZILOGPackage Cooled:DIP-42D/C:99+

Features: • Supports Spread Spectrum modulation for CPU and PCI clocks, default -0.4 downspread. • Efficient Power management scheme through stop clocks and power down modes. • Uses external 14.318MHz crystal, no external load cap required for CL=18pF crystal. • 28-pin TSSOP package, 4.40mm (173mil).

Z9023306PSC-4634

Vendor:ZILOGPackage Cooled:DIP-42D/C:01+

Z9023306PSCR52

Z9023406PSCR

Z90234-3945

Vendor:ZIOLGPackage Cooled:DIP

The general command encoding used by the serial port for EEPROM accesses is shown below in Device Access Examples, where B2-0 is the block number, P2-0 is the page number within the block and A3-0 is the byte address within the page. Bits denoted as x are ignored by the device.

Z90234-4050

Vendor:ZILOGPackage Cooled:DIP-42D/C:99+

The PHY uses the S5_LKON terminal to notify the LLC to power up and become active. When activated, the output S5_LKON signal is a square wave. The PHY activates the S5_LKON output when the LLC is inactive and a wake-up event occurs. The LLC is considered inactive when either the LPS input is inactive, as described above, or the LCtrl bit is cleared to 0. A wake-up event occurs when a link-on PHY packet a...

Z90234-4067

Package Cooled:DIP-42D/C:08+/09+

500 watt Peak Pulse Power protection at 8/20 µsec threat. Protects each data line and between Vbus supply and ground Complies with MIL STD 883C Method 3015.7 class 3 Protection Per IEC 1000-4-2, IEC 1000-4-4 Provides electrically isolated protection ULTRA LOW CAPACITANCE 5 pF line to ground ULTRA LOW CAPACITANCE 3.5 pF line to line ULTRA LOW STANDBY CURRENT

Z90234-4067

Package Cooled:DIP-42D/C:08+/09+

500 watt Peak Pulse Power protection at 8/20 µsec threat. Protects each data line and between Vbus supply and ground Complies with MIL STD 883C Method 3015.7 class 3 Protection Per IEC 1000-4-2, IEC 1000-4-4 Provides electrically isolated protection ULTRA LOW CAPACITANCE 5 pF line to ground ULTRA LOW CAPACITANCE 3.5 pF line to line ULTRA LOW STANDBY CURRENT

Z90234-4261

Vendor:ZilogPackage Cooled:DIPD/C:DIP-42

Figure 2 shows the clock, enable, and data signals for the encoder input in long frame mode. In this mode, the data is captured by the MC145532 on the falling edge of EDC. The determination of the encoding rate is made based on the number of falling EDC edges seen by the MC145532 while EIE is high. Four edges implies a 32 kbps encoding rate, three edges implies a 24 kbps encoding rate, two edges imp...

Z90234-4306

Vendor:ZIOLG

Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any p...

Z90234-4481

Package Cooled:DIP-42D/C:08+/09+

Analog input signal power at C1 dBFS; signal-to-noise (SNR) is the ratio of signal level to total noise (first five harmonics removed). Encode = 65 MSPS. SNR is reported in dBFS, related back to converter full scale. 2Analog input signal power at C1 dBFS; signal-to-noise and distortion (SINAD) is the ratio of signal level to total noise + harmonics. Encode = 65 MSPS. SINAD is reported in dBFS, related back...

Z90234-4592

Vendor:ZIOLGPackage Cooled:DIP

It is anticipated that this device will not be offered in a military qualified version. If Military/Aerospace speci- fied devices are required, please contact the National Semiconductor Sales Office / Distributors for availability and specifications.

Z90234-50CO

Vendor:ZilogPackage Cooled:00+D/C:DIP-42

Z90234-50M5

Vendor:ZilogPackage Cooled:DIP42D/C:00+

It is possible to connect the Data In and Data Out pins together. However, with this configuration it is possible for a bus conflict to occur during the dummy zero that precedes the Read operation, if A0 is a logic high level. Under such a condition the voltage level seen at Data Out is undefined and will depend upon the relative impedances of Data Out and the signal source driving A0. The higher the...

Z90234-50R3

Vendor:ZilogPackage Cooled:00+D/C:DIP-42

Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds

Z9025106

Z90255/R511P

Vendor:ZILOGPackage Cooled:DIPD/C:01+

Z90255-50CP

Vendor:ZILOG

Z9034112PSC

Vendor:ZIOLGPackage Cooled:DIP

The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word 16-bit. HM51(S)4260C has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a high speed access mode. Multiplexed address input permits the HM51(S)4260C to be packaged in standard 400-...

Z9034112PSC

Vendor:ZIOLGPackage Cooled:DIP

The Hitachi HM51(S)4260C is CMOS dynamic RAM organized as 262,144-word 16-bit. HM51(S)4260C has realized higher density, higher performance and various functions by employing 0.8 µm CMOS process technology and some new CMOS circuit design technologies. The HM51(S)4260C offers fast page mode as a high speed access mode. Multiplexed address input permits the HM51(S)4260C to be packaged in standard 400-...

Z9035612PSC

Vendor:ZILOGPackage Cooled:400D/C:98/00+

− Low Noise: 75nV PGA From 1 to 128 Precision On-Chip Voltage Reference − Accuracy: 0.2% − Drift: 5ppm/C 8 Differential/Single-Ended Channels On-Chip Offset/Gain Calibration Offset Drift: 0.02ppm/C Gain Drift: 0.5ppm/C On-Chip Temperature Sensor Burnout Sensor Detection Single-Cycle Conversion Selectable Buffer Input

Z90371169PSC

Vendor:NSCPackage Cooled:DIPD/C:01+

Z9060242FSC

Vendor:ZILOGPackage Cooled:2000D/C:97+

Note 1. Commercial Product : TA=0 to 70C and Industrial Product :TA=-40 to 85C, otherwise specified. 2. Overshoot : Vcc+3.0V for30ns pulse width. 3. Undershoot : -3.0V for30ns pulse width. 4. Overshoot and undershoot are sampled, not 100% tested.

Z9060366FSC

Vendor:ZILOGPackage Cooled:QFP/100D/C:98+

Z90T36116PSC

Vendor:ZILOG

High voltage compliance complementary current outputs are provided, increasing versatility and enabling differential opera- tion to effectively double the peak-to-peak output swing. In many applications, the outputs can be directly converted to volt- age without the need for an external op amp.

Z9233-B

Vendor:COILCRAFT/线艺D/C:02+

Case: PowerDI 123, Plastic Plastic Material: UL Flammability Classification Rating 94V-0 Moisture sensitivity: Level 1 per J-STD-020A Polarity: Cathode Band Terminals: Matte Tin Finish (Lead Free), Solderable per MIL-STD-202, Method 208 Marking: Date Code & Type Code, See Page 3 Type Code: F01 Weight: 0.01 grams (approx.) Ordering Information: See Page 3

Z9504-A

Vendor:COILCRAFTPackage Cooled:/

In Figure 1, the IC's switch-mode controller operates with an external inductor, two diodes, and two capacitors to produce 6.5V. FETs Q1 and Q2 ensure start-up for the circuit by disconnecting the load until these switch-mode supply voltages are present. Note that Q1 must be a logic-level device.

Z9972BA

Vendor:4

The bq26220 works with the host controller in the portable system to implement the battery management system. The host controller is responsible for interpreting the bq26220 data and communicating meaningful battery data to the end-user or power management system.

Z99738A

Vendor:n/aPackage Cooled:QFPD/C:06+

The periphery consists of five 8-bit wide general-purpose I/O ports, one 8-bit wide dedicated input port, and one 16-bit wide dedicated output port. The bidirectional I/O can be configured under software control as either high-impedance inputs or as totem-pole outputs. They are controlled via addressable I/O registers. The input-only port has a programmable pullup option (70-kΩ minimum resistance) a...

Z9974CA

Vendor:IMIPackage Cooled:TQFP1010-44D/C:00+

These dual monolithic silicon Zener diodes are designed for applications requiring transient overvoltage protection capability. They are intended for use in voltage and ESD sensitive equipment such as computers, printers, business machines, communication systems, medical equipment and other applications. Their dual junction common anode design protects two separate lines using only one package. These d...

ZA0482H

Vendor:originalPackage Cooled:CAN

ZA1045

Package Cooled:N/AD/C:2004+

Case: SOD-523, Plastic Case material - UL Flammability Rating Classification 94V-0 Moisture sensitivity: Level 1 per J-STD-020A Terminals: Finish - Matte Tin (Note 1) Solderable per MIL-STD-202, Method 208 Polarity: Cathode Band Marking Code: LM Weight: 0.002 grams (approx.)

ZA109

Vendor:PHILIPSPackage Cooled:06+D/C:00+

A calibration phase is provided to set the two DC offsets of channel I and channel Q close to code 127.5 and calibrate the two gains to achieve a maximum difference of 0.5 LSB. The offset and gain error can also be set externally via the 3-wire serial interface.

ZA1091S

Vendor:PHILIPSPackage Cooled:SOPD/C:.